diff options
author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-04 21:33:39 +1100 |
---|---|---|
committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-06 01:51:42 +0100 |
commit | 77757c22b9eede92234d07d65a23fdf4b970c8cf (patch) | |
tree | 29949ed8cfac9c5c9b2cf4c8071c74690411d32d /src/mainboard/hp | |
parent | d76ac6349df0147b9d8f7f09f8bb80343ecfb5e6 (diff) |
mainboard/*/romstage.c: Sanitize system header inclusions
Fix system include paths to be consistent. Chipset support is
part of the Coreboot 'system' and hence 'non-local' (i.e., in
the same directory or context). One possible product of this, is
to perhaps allow future work to do pre-compiled headers (PCH) on
the buildbot for faster build times. However, this currently just
makes mainboard's consistent.
Change-Id: I2f3fd8a3d7864926461c960ca619bff635d7dea5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8085
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r-- | src/mainboard/hp/dl145_g1/romstage.c | 6 | ||||
-rw-r--r-- | src/mainboard/hp/dl145_g3/romstage.c | 8 | ||||
-rw-r--r-- | src/mainboard/hp/dl165_g6_fam10/romstage.c | 12 | ||||
-rw-r--r-- | src/mainboard/hp/e_vectra_p2706t/romstage.c | 6 |
4 files changed, 16 insertions, 16 deletions
diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index 2b42e73e8e..db3c3063eb 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -12,14 +12,14 @@ #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include <delay.h> -#include "northbridge/amd/amdk8/amdk8.h" +#include <northbridge/amd/amdk8/amdk8.h> #include "southbridge/amd/amd8111/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include <northbridge/amd/amdk8/raminit.h> #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "southbridge/amd/amd8111/early_ctrl.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 474f273781..008b353fde 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -36,13 +36,13 @@ #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/broadcom/bcm5785/early_smbus.c" -#include "northbridge/amd/amdk8/raminit.h" +#include <northbridge/amd/amdk8/raminit.h> #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdk8/reset_test.c" #include <superio/serverengines/pilot/pilot.h> #include <superio/nsc/pc87417/pc87417.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/broadcom/bcm5785/early_setup.c" @@ -66,7 +66,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/f.h" +#include <northbridge/amd/amdk8/f.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index e22ed1c48b..b2f4c10ffe 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -39,16 +39,16 @@ #include <console/console.h> #include <cpu/amd/model_10xxx_rev.h> #include "southbridge/broadcom/bcm5785/early_smbus.c" -#include "northbridge/amd/amdfam10/raminit.h" -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdfam10/amdfam10.h> #include <lib.h> #include <spd.h> #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdfam10/reset_test.c" #include <superio/serverengines/pilot/pilot.h> #include <superio/nsc/pc87417/pc87417.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "northbridge/amd/amdfam10/debug.c" #include "southbridge/broadcom/bcm5785/early_setup.c" @@ -71,11 +71,11 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdfam10/amdfam10.h" +#include <northbridge/amd/amdfam10/amdfam10.h> #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" #include "northbridge/amd/amdfam10/pci.c" #include "cpu/amd/quadcore/quadcore.c" -#include "cpu/amd/microcode.h" +#include <cpu/amd/microcode.h> #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" diff --git a/src/mainboard/hp/e_vectra_p2706t/romstage.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c index f54e0e85aa..dcdd552caa 100644 --- a/src/mainboard/hp/e_vectra_p2706t/romstage.c +++ b/src/mainboard/hp/e_vectra_p2706t/romstage.c @@ -27,9 +27,9 @@ /* TODO: It's a PC87364 actually! */ #include <superio/nsc/pc87360/pc87360.h> /* TODO: It's i810E actually! */ -#include "northbridge/intel/i82810/raminit.h" -#include "cpu/x86/bist.h" -#include "southbridge/intel/i82801ax/i82801ax.h" +#include <northbridge/intel/i82810/raminit.h> +#include <cpu/x86/bist.h> +#include <southbridge/intel/i82801ax/i82801ax.h> #include "drivers/pc80/udelay_io.c" #include <lib.h> |