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authorMyles Watson <mylesgw@gmail.com>2009-11-06 23:42:26 +0000
committerMyles Watson <mylesgw@gmail.com>2009-11-06 23:42:26 +0000
commitd27c08c2898d1d74765a7799628d1c18369fd671 (patch)
tree7ac357d2b44d833c6efe70d1e691c6611c521e8d /src/mainboard/hp
parent547d48ab01049a634dccb16d1847524d5ba93e33 (diff)
Remove drivers/pci/onboard. The only purpose was for option ROMs, which are
now handled more generically using CBFS. Simplify the option ROM code in device/pci_rom.c, since there are only two ways to get a ROM address now (CBFS and the device) and add an exception for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r--src/mainboard/hp/dl145_g3/Config.lb9
-rw-r--r--src/mainboard/hp/dl145_g3/devicetree.cb9
-rw-r--r--src/mainboard/hp/e_vectra_p2706t/Config.lb4
-rw-r--r--src/mainboard/hp/e_vectra_p2706t/devicetree.cb4
4 files changed, 2 insertions, 24 deletions
diff --git a/src/mainboard/hp/dl145_g3/Config.lb b/src/mainboard/hp/dl145_g3/Config.lb
index e0eb5d3ca8..6c0508e217 100644
--- a/src/mainboard/hp/dl145_g3/Config.lb
+++ b/src/mainboard/hp/dl145_g3/Config.lb
@@ -195,15 +195,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 2.1 on end # USB
device pci 2.2 on end # USB
device pci 3.0 on end # VGA
-
- #bx_a013+ start
- #chip drivers/pci/onboard #SATA2
- # device pci 5.0 on end
- # device pci 5.1 on end
- # device pci 5.2 on end
- # device pci 5.3 on end
- #end
- #bx_a013+ end
end
end
device pci 18.0 on end
diff --git a/src/mainboard/hp/dl145_g3/devicetree.cb b/src/mainboard/hp/dl145_g3/devicetree.cb
index 0d038d333e..80b9b33f84 100644
--- a/src/mainboard/hp/dl145_g3/devicetree.cb
+++ b/src/mainboard/hp/dl145_g3/devicetree.cb
@@ -72,15 +72,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 2.1 on end # USB
device pci 2.2 on end # USB
device pci 3.0 on end # VGA
-
- #bx_a013+ start
- #chip drivers/pci/onboard #SATA2
- # device pci 5.0 on end
- # device pci 5.1 on end
- # device pci 5.2 on end
- # device pci 5.3 on end
- #end
- #bx_a013+ end
end
end
device pci 18.0 on end
diff --git a/src/mainboard/hp/e_vectra_p2706t/Config.lb b/src/mainboard/hp/e_vectra_p2706t/Config.lb
index 535c30caa0..c158b8178b 100644
--- a/src/mainboard/hp/e_vectra_p2706t/Config.lb
+++ b/src/mainboard/hp/e_vectra_p2706t/Config.lb
@@ -76,9 +76,7 @@ chip northbridge/intel/i82810 # Northbridge
end
device pci_domain 0 on
device pci 0.0 on end # Host bridge
- chip drivers/pci/onboard # Onboard VGA
- device pci 1.0 on end
- end
+ device pci 1.0 on end # Onboard VGA
chip southbridge/intel/i82801xx # Southbridge
register "ide0_enable" = "1"
register "ide1_enable" = "1"
diff --git a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb
index a10dee89fc..82209d4317 100644
--- a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb
+++ b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb
@@ -7,9 +7,7 @@ chip northbridge/intel/i82810 # Northbridge
end
device pci_domain 0 on
device pci 0.0 on end # Host bridge
- chip drivers/pci/onboard # Onboard VGA
- device pci 1.0 on end
- end
+ device pci 1.0 on end # Onboard VGA
chip southbridge/intel/i82801xx # Southbridge
register "ide0_enable" = "1"
register "ide1_enable" = "1"