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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-03-17 22:44:39 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-03-17 22:44:39 +0000
commitce6fb1ee2b37193fa828b4c6d475e23c58171346 (patch)
tree7207e49edde04fefd1a9208a73135d7a27c7b3dc /src/mainboard/hp
parent78b40335841eae958865f67ac8ee0020fd43aead (diff)
Remove failover/fallback/normal handling in mainboards'
romstage.c. That's newconfig stuff. 1. In failover_process(), I removed the fallback/normal selection logic and kept the remaining hardware init in. The if-clauses' conditions are reverted to match. Remove #if failover||fallback guard. 2. Change cache_as_ram_main() to first call failover_process, then real_main unconditionally. 3. Move failover_process's code to the beginning of real_main, remove failover_process and its call in cache_as_ram_main. 4. Remove cache_as_ram_main, rename real_main to cache_as_ram_main (same arguments, so no problem with that) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c84
1 files changed, 12 insertions, 72 deletions
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 525cb3e102..c2b225f697 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -155,8 +155,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#endif
-#if ((CONFIG_HAVE_FAILOVER_BOOT==1) && (CONFIG_USE_FAILOVER_IMAGE == 1)) || ((CONFIG_HAVE_FAILOVER_BOOT==0) && (CONFIG_USE_FALLBACK_IMAGE == 1))
-
#include "northbridge/amd/amdk8/early_ht.c"
#if 0
@@ -197,78 +195,9 @@ static void setup_early_ipmi_serial()
}
#endif
-
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
- /* Is this a cpu only reset? Is this a secondary cpu? */
- if ((cpu_init_detectedx) || (!boot_cpu())) {
- if (last_boot_normal()) { // RTC already inited
- goto normal_image; //normal_image;
- } else {
- goto fallback_image;
- }
- }
-
- /* Nothing special needs to be done to find bus 0 */
- /* Allow the HT devices to be found */
-
- enumerate_ht_chain();
- bcm5785_enable_rom();
- bcm5785_enable_lpc();
- //enable RTC
- pc87417_enable_dev(RTC_DEV);
-
- /* Is this a deliberate reset by the bios */
-
- if (bios_reset_detected() && last_boot_normal()) {
- goto normal_image;
- }
- /* This is the primary cpu how should I boot? */
- else if (do_normal_boot()) {
- goto normal_image;
- }
- else {
- goto fallback_image;
- }
- normal_image:
- __asm__ volatile ("jmp __normal_image"
- : /* outputs */
- : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
- );
-
- fallback_image:
-#if CONFIG_HAVE_FAILOVER_BOOT==1
- __asm__ volatile ("jmp __fallback_image"
- : /* outputs */
- : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
- )
-#endif
- ;
-
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-#if CONFIG_HAVE_FAILOVER_BOOT==1
- #if CONFIG_USE_FAILOVER_IMAGE==1
- failover_process(bist, cpu_init_detectedx);
- #else
- real_main(bist, cpu_init_detectedx);
- #endif
-#else
- #if CONFIG_USE_FALLBACK_IMAGE == 1
- failover_process(bist, cpu_init_detectedx);
- #endif
- real_main(bist, cpu_init_detectedx);
-#endif
-}
-
#if CONFIG_USE_FAILOVER_IMAGE==0
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
+void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
static const uint16_t spd_addr[] = {
//first node
@@ -287,6 +216,17 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
int needs_reset;
unsigned bsp_apicid = 0;
+ if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+ /* Nothing special needs to be done to find bus 0 */
+ /* Allow the HT devices to be found */
+
+ enumerate_ht_chain();
+ bcm5785_enable_rom();
+ bcm5785_enable_lpc();
+ //enable RTC
+ pc87417_enable_dev(RTC_DEV);
+ }
+
if (bist == 0) {
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);