mb/hp: Enable additional ports at WWAN slot for Elitebooks

2760p: enable PCIe
8470p: enable mSATA
8460p: enable PCIe, also add comments according to circuit diagram
2570p: comment for some USB ports

Change-Id: Ib5209f2dfb249fca5bae89bc6da3b704c8e903dd
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/23357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bill XIE <persmule@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>

5 files changed, 22 insertions, 20 deletions

diff --git a/src/mainboard/hp/2570p/romstage.c b/src/mainboard/hp/2570p/romstage.c
index 0742543130..b2095b9071 100644
--- a/src/mainboard/hp/2570p/romstage.c
+++ b/src/mainboard/hp/2570p/romstage.c
@@ -42,14 +42,14 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
 	{ 1, 1, 1 },
 	{ 1, 1, 1 },
 	{ 1, 0, 2 },
-	{ 1, 0, 2 },
+	{ 1, 0, 2 }, /* bluetooth */
 	{ 0, 0, 3 },
-	{ 1, 0, 3 },
-	{ 1, 1, 4 },
+	{ 1, 0, 3 }, /* smartcard */
 	{ 1, 1, 4 },
-	{ 1, 0, 5 },
+	{ 1, 1, 4 }, /* mainboard USB 2.0 */
+	{ 1, 0, 5 }, /* camera */
 	{ 0, 0, 5 },
-	{ 1, 0, 6 },
+	{ 1, 0, 6 }, /* WWAN */
 	{ 0, 0, 6 },
 };
 
diff --git a/src/mainboard/hp/2760p/devicetree.cb b/src/mainboard/hp/2760p/devicetree.cb
index e63b69cd84..041b5e8f42 100644
--- a/src/mainboard/hp/2760p/devicetree.cb
+++ b/src/mainboard/hp/2760p/devicetree.cb
@@ -106,7 +106,7 @@ chip northbridge/intel/sandybridge
 			end
 			device pci 1c.5 off # PCIe Port #6
 			end
-			device pci 1c.6 off # PCIe Port #7
+			device pci 1c.6 on # PCIe Port #7, WWAN
 			end
 			device pci 1c.7 off # PCIe Port #8
 			end
diff --git a/src/mainboard/hp/8460p/devicetree.cb b/src/mainboard/hp/8460p/devicetree.cb
index ae78f8a8f8..9f9efbb627 100644
--- a/src/mainboard/hp/8460p/devicetree.cb
+++ b/src/mainboard/hp/8460p/devicetree.cb
@@ -67,6 +67,7 @@ chip northbridge/intel/sandybridge
 			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
 			register "pcie_port_coalesce" = "1"
 			register "sata_interface_speed_support" = "0x3"
+			# HDD(0), ODD(1), docking(3,5), eSATA(4)
 			register "sata_port_map" = "0x3b"
 
 			register "spi_uvscc" = "0x2005"
@@ -107,7 +108,7 @@ chip northbridge/intel/sandybridge
 			end
 			device pci 1c.5 off # PCIe Port #6
 			end
-			device pci 1c.6 off # PCIe Port #7
+			device pci 1c.6 on # PCIe Port #7, WWAN
 			end
 			device pci 1c.7 on # PCIe Port #8, NEC USB 3.0 Host Controller
 				subsystemid 0x103c 0x161c
diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c
index 0aa9a1ae58..b97d5e4710 100644
--- a/src/mainboard/hp/8460p/romstage.c
+++ b/src/mainboard/hp/8460p/romstage.c
@@ -43,20 +43,20 @@ void mainboard_rcba_config(void)
 }
 
 const struct southbridge_usb_port mainboard_usb_ports[] = {
-	{ 1, 1, 0 },
-	{ 1, 0, 0 },
+	{ 1, 1, 0 }, /* USB0, eSATA */
+	{ 1, 0, 0 }, /* USB charger */
 	{ 0, 1, 1 },
-	{ 1, 1, 1 },
-	{ 1, 0, 2 },
-	{ 1, 0, 2 },
+	{ 1, 1, 1 }, /* camera */
+	{ 1, 0, 2 }, /* USB4 expresscard */
+	{ 1, 0, 2 }, /* bluetooth */
 	{ 0, 0, 3 },
-	{ 1, 0, 3 },
-	{ 1, 1, 4 },
-	{ 1, 1, 4 },
-	{ 1, 0, 5 },
-	{ 1, 0, 5 },
-	{ 1, 0, 6 },
-	{ 1, 0, 6 },
+	{ 1, 0, 3 }, /* smartcard */
+	{ 1, 1, 4 }, /* fingerprint */
+	{ 1, 1, 4 }, /* WWAN */
+	{ 1, 0, 5 }, /* CONN */
+	{ 1, 0, 5 }, /* docking */
+	{ 1, 0, 6 }, /* CONN */
+	{ 1, 0, 6 }, /* docking */
 };
 
 void mainboard_early_init(int s3resume)
diff --git a/src/mainboard/hp/8470p/devicetree.cb b/src/mainboard/hp/8470p/devicetree.cb
index b7254bb38d..9d6fe3ff23 100644
--- a/src/mainboard/hp/8470p/devicetree.cb
+++ b/src/mainboard/hp/8470p/devicetree.cb
@@ -68,7 +68,8 @@ chip northbridge/intel/sandybridge
 			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
 			register "pcie_port_coalesce" = "1"
 			register "sata_interface_speed_support" = "0x3"
-			register "sata_port_map" = "0x3b"
+			# HDD(0), ODD(1), mSATA(2), eSATA(4)
+			register "sata_port_map" = "0x3f"
 			register "superspeed_capable_ports" = "0x0000000f"
 			register "xhci_overcurrent_mapping" = "0x00000c03"
 			register "xhci_switchable_ports" = "0x0000000f"