hp/pavilion_m6_1035dx: Sanitize #includes

There were a number of things wrong with the includes. First, The
includes did not use paths to AGESA files, thus relying on the
compiler include paths to find the correct file. This made it unclear
where the file included was located, and whether it was local, under
vendorcode, or under a different directory. Instead, use full paths
for each non-local include.

Second, the local includes were mixed with the rest, making it unclear
which file is local and which one is not. Keep the local includes at
the top. This also prevents us from polluting the namespace of local
headers, with library definitions, and allows us to catch if we missed
an otherwise needed external header.

Thirdly, alphabetize the order of includes where possible.

Change-Id: I22c543291beabb83c16d912ea0a490be6ca4e03c
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5412
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

1 files changed, 17 insertions, 26 deletions

diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
index 1a231904c5..3a80e0121b 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
@@ -33,9 +33,21 @@
  * @e \$Revision: 23714 $   @e \$Date: 2009-12-09 17:28:37 -0600 (Wed, 09 Dec 2009) $
  */
 
-#include "AGESA.h"
-//#include "CommonReturns.h"
-#include "Filecode.h"
+#include <vendorcode/amd/agesa/f15tn/AGESA.h>
+
+/*  Include the files that instantiate the configuration definitions.  */
+#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
+#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
+/* AGESA nonesense: the next two headers depend on heapManager.h */
+#include <vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h>
+/* These tables are optional and may be used to adjust memory timing settings */
+#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
+
 #define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
 
 /*  Select the cpu family.  */
@@ -250,22 +262,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
 
 #define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
 
-//#include  "VirgoInstall.h"
-
-/*  Include the files that instantiate the configuration definitions.  */
-#include "cpuRegisters.h"
-#include "cpuFamRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "AdvancedApi.h"
-#include "heapManager.h"
-#include "CreateStruct.h"
-#include "cpuFeatures.h"
-#include "Table.h"
-#include "CommonReturns.h"
-#include "cpuEarlyInit.h"
-#include "cpuLateInit.h"
-#include "GnbInterface.h"
-
                   // This is the delivery package title, "BrazosPI"
                   // This string MUST be exactly 8 characters long
 #define AGESA_PACKAGE_STRING  {'c', 'b', '_', 'A', 'g', 'e', 's', 'a'}
@@ -363,7 +359,8 @@ GPIO_CONTROL   parmer_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+/* AGESA nonsense: this header depends on the definitions above */
+#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
 
 /*----------------------------------------------------------------------------------------
  *                        CUSTOMER OVERIDES MEMORY TABLE
@@ -447,12 +444,6 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
   PSO_END
 };
 
-/*
- * These tables are optional and may be used to adjust memory timing settings
- */
-#include "mm.h"
-#include "mn.h"
-
 // Customer table
 UINT8 AGESA_MEM_TABLE_TN[][sizeof (MEM_TABLE_ALIAS)] =
 {