diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-01-01 20:52:11 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2020-01-10 15:11:30 +0000 |
commit | a0a3eab36d04b6fa96b900493b1b1d0d2837c20a (patch) | |
tree | 036b36ec051a155032467c0bd6a86f84afa541b7 /src/mainboard/hp/folio_9470m | |
parent | 0560a66450a600d8038933210dd3406cbb298131 (diff) |
mb/hp/*/devicetree.cb: Inherit the subsystemid
Since all the `subsystemid` lines in these devicetrees use the same
values, factor them out via inheritance.
There are some exceptions though. There are some enabled devices which
lack a `subsystemid` entry. Looks like HP uses the same subsystem ID
on every device, so assume that these devices should also use that
subsystem ID as well.
While we are at it, tidy up all the now-empty device blocks.
Change-Id: Iccd74fff9456e1204735a80ecc4f7685624cb78e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38081
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/hp/folio_9470m')
-rw-r--r-- | src/mainboard/hp/folio_9470m/devicetree.cb | 95 |
1 files changed, 29 insertions, 66 deletions
diff --git a/src/mainboard/hp/folio_9470m/devicetree.cb b/src/mainboard/hp/folio_9470m/devicetree.cb index cd610b6ac6..7d0265d786 100644 --- a/src/mainboard/hp/folio_9470m/devicetree.cb +++ b/src/mainboard/hp/folio_9470m/devicetree.cb @@ -43,6 +43,8 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did end end device domain 0x0 on + subsystemid 0x103c 0x18df inherit + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "docking_supported" = "0" @@ -61,54 +63,26 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did register "superspeed_capable_ports" = "0x0000000f" register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_switchable_ports" = "0x0000000f" - device pci 14.0 on # USB 3.0 Controller - subsystemid 0x103c 0x18df - end - device pci 16.0 off # Management Engine Interface 1 - subsystemid 0x103c 0x18df - end - device pci 16.1 off # Management Engine Interface 2 - end - device pci 16.2 off # Management Engine IDE-R - end - device pci 16.3 off # Management Engine KT - subsystemid 0x103c 0x18df - end - device pci 19.0 on # Intel Gigabit Ethernet - subsystemid 0x103c 0x18df - end - device pci 1a.0 on # USB2 EHCI #2 - subsystemid 0x103c 0x18df - end - device pci 1b.0 on # High Definition Audio Audio controller - subsystemid 0x103c 0x18df - end - device pci 1c.0 on # PCIe Port #1 - subsystemid 0x103c 0x18df - end - device pci 1c.1 off # PCIe Port #2 - end - device pci 1c.2 on # PCIe Port #3 - subsystemid 0x103c 0x18df - end # SDHCI - device pci 1c.3 on # PCIe Port #4 - subsystemid 0x103c 0x18df - end # WLAN - device pci 1c.4 off # PCIe Port #5 - end - device pci 1c.5 off # PCIe Port #6 - end - device pci 1c.6 off # PCIe Port #7 - end - device pci 1c.7 off # PCIe Port #8 - end - device pci 1d.0 on # USB2 EHCI #1 - subsystemid 0x103c 0x18df - end - device pci 1e.0 off # PCI bridge - end - device pci 1f.0 on # LPC bridge PCI-LPC bridge - subsystemid 0x103c 0x18df + + device pci 14.0 on end # USB 3.0 Controller + device pci 16.0 off end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 19.0 on end # Intel Gigabit Ethernet + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 on end # High Definition Audio Audio controller + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 off end # PCIe Port #2 + device pci 1c.2 on end # PCIe Port #3 SDHCI + device pci 1c.3 on end # PCIe Port #4 WLAN + device pci 1c.4 off end # PCIe Port #5 + device pci 1c.5 off end # PCIe Port #6 + device pci 1c.6 off end # PCIe Port #7 + device pci 1c.7 off end # PCIe Port #8 + device pci 1d.0 on end # USB2 EHCI #1 + device pci 1e.0 off end # PCI bridge + device pci 1f.0 on # LPC bridge PCI-LPC bridge chip ec/hp/kbc1126 register "ec_data_port" = "0x62" register "ec_cmd_port" = "0x66" @@ -121,24 +95,13 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did device pnp 0c31.0 on end end end - device pci 1f.2 on # SATA Controller 1 - subsystemid 0x103c 0x18df - end - device pci 1f.3 on # SMBus - subsystemid 0x103c 0x18df - end - device pci 1f.5 off # SATA Controller 2 - end - device pci 1f.6 off # Thermal - end - end - device pci 00.0 on # Host bridge Host bridge - subsystemid 0x103c 0x18df - end - device pci 01.0 off # PCIe Bridge for discrete graphics - end - device pci 02.0 on # Internal graphics VGA controller - subsystemid 0x103c 0x18df + device pci 1f.2 on end # SATA Controller 1 + device pci 1f.3 on end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 off end # Thermal end + device pci 00.0 on end # Host bridge Host bridge + device pci 01.0 off end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller end end |