mainboard/hp: Add Elitebook Folio 9470m

The code is based on autoport and that for revolve_810g1

Tested:
- CPU i5-3437U
- Slotted DIMM 8GiB
- Onboard USB2 interfaces (wlan slot, wwan slot, camera, smart card)
- Mini pci-e on wlan slot
- On board SDHCI connected to pci-e
- USB3 ports
- USB3 hub on dock (connected to USB3 port 1)
- NVRAM options for North and South bridges
- S3
- TPM1 on LPC
- Linux 4.13.17-1 within Debian GNU/Linux testing, loaded from
  SeaBIOS, or Linux payload (Heads)

Not tested:
- Fingerprint reader on USB2

Not working well:
- EHCI debug on port SSP2,(The USB port on the left, wired to ehci
  before OS) it has always-on enabled by default (maybe via EC),
  which disturbs FT232H's own power up, requiring a very critical
  timing to plug it in for it to work.

Change-Id: I52e549ec18e8aa661a506a16dbc7f83417c0da78
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/25218
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 148 insertions, 0 deletions

diff --git a/src/mainboard/hp/folio_9470m/devicetree.cb b/src/mainboard/hp/folio_9470m/devicetree.cb
new file mode 100644
index 0000000000..56d90d38df
--- /dev/null
+++ b/src/mainboard/hp/folio_9470m/devicetree.cb
@@ -0,0 +1,148 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2018 Bill Xie <persmule@gmail.com>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.ndid" = "3"
+	register "gfx.use_spread_spectrum_clock" = "1"
+	register "gpu_cpu_backlight" = "0x00000d9c"
+	register "gpu_dp_b_hotplug" = "4"
+	register "gpu_dp_c_hotplug" = "4"
+	register "gpu_dp_d_hotplug" = "4"
+	register "gpu_panel_port_select" = "0"
+	register "gpu_panel_power_backlight_off_delay" = "2000"
+	register "gpu_panel_power_backlight_on_delay" = "2000"
+	register "gpu_panel_power_cycle_delay" = "5"
+	register "gpu_panel_power_down_delay" = "230"
+	register "gpu_panel_power_up_delay" = "300"
+	register "gpu_pch_backlight" = "0x0d9c0d9c"
+	device cpu_cluster 0x0 on
+		chip cpu/intel/socket_rPGA989
+			device lapic 0x0 on
+			end
+		end
+		chip cpu/intel/model_206ax # FIXME: check all registers
+			register "c1_acpower" = "1"
+			register "c1_battery" = "1"
+			register "c2_acpower" = "3"
+			register "c2_battery" = "3"
+			register "c3_acpower" = "5"
+			register "c3_battery" = "5"
+			device lapic 0xacac off
+			end
+		end
+	end
+	device domain 0x0 on
+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
+			register "c2_latency" = "0x0065"
+			register "docking_supported" = "0"
+			register "gen1_dec" = "0x007c0201"
+			register "gen2_dec" = "0x000c0101"
+			register "gen3_dec" = "0x00fcfe01"
+			register "gen4_dec" = "0x000402e9"
+			register "gpi6_routing" = "2"
+			register "p_cnt_throttling_supported" = "1"
+			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
+			register "pcie_port_coalesce" = "1"
+			register "sata_interface_speed_support" = "0x3"
+			register "sata_port_map" = "0x3"
+			register "spi_lvscc" = "0x0"
+			register "spi_uvscc" = "0x2005"
+			register "superspeed_capable_ports" = "0x0000000f"
+			register "xhci_overcurrent_mapping" = "0x00000c03"
+			register "xhci_switchable_ports" = "0x0000000f"
+			device pci 14.0 on # USB 3.0 Controller
+				subsystemid 0x103c 0x18df
+			end
+			device pci 16.0 off # Management Engine Interface 1
+				subsystemid 0x103c 0x18df
+			end
+			device pci 16.1 off # Management Engine Interface 2
+			end
+			device pci 16.2 off # Management Engine IDE-R
+			end
+			device pci 16.3 off # Management Engine KT
+				subsystemid 0x103c 0x18df
+			end
+			device pci 19.0 on # Intel Gigabit Ethernet
+				subsystemid 0x103c 0x18df
+			end
+			device pci 1a.0 on # USB2 EHCI #2
+				subsystemid 0x103c 0x18df
+			end
+			device pci 1b.0 on # High Definition Audio Audio controller
+				subsystemid 0x103c 0x18df
+			end
+			device pci 1c.0 on # PCIe Port #1
+				subsystemid 0x103c 0x18df
+			end
+			device pci 1c.1 off # PCIe Port #2
+			end
+			device pci 1c.2 on # PCIe Port #3
+				subsystemid 0x103c 0x18df
+			end # SDHCI
+			device pci 1c.3 on # PCIe Port #4
+				subsystemid 0x103c 0x18df
+			end # WLAN
+			device pci 1c.4 off # PCIe Port #5
+			end
+			device pci 1c.5 off # PCIe Port #6
+			end
+			device pci 1c.6 off # PCIe Port #7
+			end
+			device pci 1c.7 off # PCIe Port #8
+			end
+			device pci 1d.0 on # USB2 EHCI #1
+				subsystemid 0x103c 0x18df
+			end
+			device pci 1e.0 off # PCI bridge
+			end
+			device pci 1f.0 on # LPC bridge PCI-LPC bridge
+				subsystemid 0x103c 0x18df
+				chip ec/hp/kbc1126
+					register "ec_data_port" = "0x62"
+					register "ec_cmd_port" = "0x66"
+					register "ec_ctrl_reg" = "0x81"
+					register "ec_fan_ctrl_value" = "0x44"
+					device pnp ff.1 off end
+				end # kbc1126
+
+				chip drivers/pc80/tpm
+					device pnp 0c31.0 on end
+				end
+			end
+			device pci 1f.2 on # SATA Controller 1
+				subsystemid 0x103c 0x18df
+			end
+			device pci 1f.3 on # SMBus
+				subsystemid 0x103c 0x18df
+			end
+			device pci 1f.5 off # SATA Controller 2
+			end
+			device pci 1f.6 off # Thermal
+			end
+		end
+		device pci 00.0 on # Host bridge Host bridge
+			subsystemid 0x103c 0x18df
+		end
+		device pci 01.0 off # PCIe Bridge for discrete graphics
+		end
+		device pci 02.0 on # Internal graphics VGA controller
+			subsystemid 0x103c 0x18df
+		end
+	end
+end