diff options
author | Arne Georg Gleditsch <arne.gleditsch@numascale.com> | 2010-09-24 17:35:32 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-09-24 17:35:32 +0000 |
commit | 9139e7b7c55d34ae3c5e8b941db037a92d2ace54 (patch) | |
tree | fa823ccd1eb9b3c9e7a6f7fe8d6e08e1f1a0eab6 /src/mainboard/hp/dl165_g6_fam10/bootblock.c | |
parent | 16db6c3486fba7292bade3233df96b4ab2ecc889 (diff) |
Add support for HP DL165-G6 with Fam10 CPU.
Original patch was
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Updates to accomodate changes in coreboot are
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/hp/dl165_g6_fam10/bootblock.c')
-rw-r--r-- | src/mainboard/hp/dl165_g6_fam10/bootblock.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/hp/dl165_g6_fam10/bootblock.c b/src/mainboard/hp/dl165_g6_fam10/bootblock.c new file mode 100644 index 0000000000..2c56c4ccf5 --- /dev/null +++ b/src/mainboard/hp/dl165_g6_fam10/bootblock.c @@ -0,0 +1,48 @@ +#include <device/pnp_def.h> + +#define SCH4307_CONFIG_PORT 0x162e +static inline void shc4307_enter_ext_func_mode(device_t dev) +{ + unsigned port = dev >> 8; + outb(0x55, port); +} + +static inline void shc4307_exit_ext_func_mode(device_t dev) +{ + unsigned port = dev >> 8; + outb(0xaa, port); +} + +#define CMOS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x6) +#define KBD_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x7) +#define DBG_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x3) +#define REGS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0xa) + +void shc4307_init(void) +{ + shc4307_enter_ext_func_mode(CMOS_DEV); + pnp_set_logical_device(CMOS_DEV); /* CMOS/RTC */ + pnp_set_iobase(CMOS_DEV, PNP_IDX_IO0, 0x70); + pnp_set_iobase(CMOS_DEV, PNP_IDX_IO1, 0x72); + pnp_set_irq(CMOS_DEV, PNP_IDX_IRQ0, 8); + /* pnp_set_enable(CMOS_DEV, 3); */ + pnp_write_config(CMOS_DEV, 0x30, 3); + + pnp_set_logical_device(KBD_DEV); /* Keyboard */ + pnp_set_irq(KBD_DEV, PNP_IDX_IRQ0, 1); + pnp_set_enable(KBD_DEV, 1); + + pnp_set_logical_device(DBG_DEV); /* Debug */ + pnp_set_iobase(DBG_DEV, PNP_IDX_IO0, 0x80); + pnp_set_enable(DBG_DEV, 1); + + pnp_set_logical_device(REGS_DEV); + pnp_set_iobase(REGS_DEV, PNP_IDX_IO0, 0x600); + pnp_set_enable(REGS_DEV, 1); + + shc4307_exit_ext_func_mode(CMOS_DEV); +} + +static void bootblock_southbridge_init(void) { + shc4307_init(); +} |