diff options
author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 12:32:52 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 12:32:52 +0000 |
commit | 91ff0df62777a9ec4a399ef899803c05e7caad60 (patch) | |
tree | 93bc6c2927195fe3e991172acb3c923d89ec6bec /src/mainboard/hp/dl145_g3/Kconfig | |
parent | 748475b800c552236aff16c1beffd55b70791ae6 (diff) |
More Kconfig-supported boards, and also kconfig support
for amd/socket_AM2R2, amd/socket_939, drivers/ati/ragexl
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/hp/dl145_g3/Kconfig')
-rw-r--r-- | src/mainboard/hp/dl145_g3/Kconfig | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig new file mode 100644 index 0000000000..60cbcfe82a --- /dev/null +++ b/src/mainboard/hp/dl145_g3/Kconfig @@ -0,0 +1,105 @@ +config BOARD_HP_DL145_G3 + bool "DL145-G3" + select ARCH_X86 + select CPU_AMD_K8 + select CPU_AMD_SOCKET_F + select NORTHBRIDGE_AMD_AMDK8 + select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX + select SOUTHBRIDGE_BROADCOM_BCM21000 + select SOUTHBRIDGE_BROADCOM_BCM5785 + select SUPERIO_NSC_PC87417 + select HAVE_PIRQ_TABLE + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM + select HAVE_HARD_RESET + select IOAPIC + +config MAINBOARD_DIR + string + default hp/dl145_g3 + depends on BOARD_HP_DL145_G3 + +config DCACHE_RAM_BASE + hex + default 0xcc000 + depends on BOARD_HP_DL145_G3 + +config DCACHE_RAM_SIZE + hex + default 0x04000 + depends on BOARD_HP_DL145_G3 + +config DCACHE_RAM_GLOBAL_VAR_SIZE + hex + default 0x01000 + depends on BOARD_HP_DL145_G3 + +config APIC_ID_OFFSET + hex + default 0x10 + depends on BOARD_HP_DL145_G3 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_HP_DL145_G3 + +config SB_HT_CHAIN_UNITID_OFFSET_ONLY + bool + default n + depends on BOARD_HP_DL145_G3 + +config LB_CKS_RANGE_END + int + default 122 + depends on BOARD_HP_DL145_G3 + +config LB_CKS_LOC + int + default 123 + depends on BOARD_HP_DL145_G3 + +config MAINBOARD_PART_NUMBER + string + default "DL145G3" + depends on BOARD_HP_DL145_G3 + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_HP_DL145_G3 + +config MAX_CPUS + int + default 4 + depends on BOARD_HP_DL145_G3 + +config MAX_PHYSICAL_CPUS + int + default 2 + depends on BOARD_HP_DL145_G3 + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x0 + depends on BOARD_HP_DL145_G3 + +config HT_CHAIN_UNITID_BASE + hex + default 0x0 + depends on BOARD_HP_DL145_G3 + +config USE_INIT + bool + default n + depends on BOARD_HP_DL145_G3 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_HP_DL145_G3 + +config IRQ_SLOT_COUNT + int + default 15 + depends on BOARD_HP_DL145_G3 |