mb/hp/8460p: Transform into variant

Tested with BUILD_TIMELESS=1, binary does not change.

Change-Id: I17b6ac9ac2433b760e125a1ce708d3b422b632b5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38092
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 0 insertions, 115 deletions

diff --git a/src/mainboard/hp/8460p/devicetree.cb b/src/mainboard/hp/8460p/devicetree.cb
deleted file mode 100644
index 5bbb4feb3c..0000000000
--- a/src/mainboard/hp/8460p/devicetree.cb
+++ /dev/null
@@ -1,115 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-chip northbridge/intel/sandybridge
-	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
-	register "gfx.link_frequency_270_mhz" = "1"
-	register "gfx.ndid" = "3"
-	register "gfx.use_spread_spectrum_clock" = "1"
-	register "gpu_cpu_backlight" = "0x00000129"
-	register "gpu_dp_b_hotplug" = "4"
-	register "gpu_dp_c_hotplug" = "4"
-	register "gpu_dp_d_hotplug" = "4"
-	register "gpu_panel_port_select" = "0"
-	register "gpu_panel_power_backlight_off_delay" = "2000"
-	register "gpu_panel_power_backlight_on_delay" = "2000"
-	register "gpu_panel_power_cycle_delay" = "5"
-	register "gpu_panel_power_down_delay" = "230"
-	register "gpu_panel_power_up_delay" = "300"
-	register "gpu_pch_backlight" = "0x02880288"
-	device cpu_cluster 0x0 on
-		chip cpu/intel/model_206ax
-			register "c1_acpower" = "1"
-			register "c1_battery" = "1"
-			register "c2_acpower" = "3"
-			register "c2_battery" = "3"
-			register "c3_acpower" = "5"
-			register "c3_battery" = "5"
-			device lapic 0x0 on end
-			device lapic 0xacac off end
-		end
-	end
-	device domain 0x0 on
-		subsystemid 0x103c 0x161c inherit
-
-		device pci 00.0 on  end	# Host bridge
-		device pci 01.0 on  end	# PCIe Bridge for discrete graphics
-		device pci 02.0 on  end	# Internal graphics
-
-		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-			register "c2_latency" = "0x0065"
-			register "docking_supported" = "0"
-			# mailbox at 0x200/0x201 and PM1 at 0x220
-			register "gen1_dec" = "0x007c0201"
-			register "gen2_dec" = "0x000c0101"
-			register "gen3_dec" = "0x00fcfe01"
-			register "gen4_dec" = "0x000402e9"
-			register "gpi6_routing" = "2"
-			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
-			register "pcie_port_coalesce" = "1"
-			register "sata_interface_speed_support" = "0x3"
-			# HDD(0), ODD(1), docking(3,5), eSATA(4)
-			register "sata_port_map" = "0x3b"
-			register "spi_uvscc" = "0x2005"
-			register "spi_lvscc" = "0"
-
-			device pci 16.0 on  end	# Management Engine Interface 1
-			device pci 16.1 off end	# Management Engine Interface 2
-			device pci 16.2 off end	# Management Engine IDE-R
-			device pci 16.3 on  end	# Management Engine KT
-			device pci 19.0 on  end	# Intel Gigabit Ethernet
-			device pci 1a.0 on  end	# USB2 EHCI #2
-			device pci 1b.0 on  end	# HD Audio controller
-			device pci 1c.0 on  end	# PCIe Port #1
-			device pci 1c.1 on  end	# PCIe Port #2, ExpressCard
-			device pci 1c.2 on  end	# PCIe Port #3, SD/MMC
-			device pci 1c.3 on  end	# PCIe Port #4, WLAN
-			device pci 1c.4 off end	# PCIe Port #5
-			device pci 1c.5 off end	# PCIe Port #6
-			device pci 1c.6 on  end	# PCIe Port #7, WWAN
-			device pci 1c.7 on  end	# PCIe Port #8, NEC USB 3.0 Host Controller
-			device pci 1d.0 on  end	# USB2 EHCI #1
-			device pci 1e.0 off end	# PCI bridge
-			device pci 1f.0 on	# LPC bridge
-				chip ec/hp/kbc1126
-					register "ec_data_port" = "0x60"
-					register "ec_cmd_port"  = "0x64"
-					register "ec_ctrl_reg"  = "0xca"
-					register "ec_fan_ctrl_value" = "0x6b"
-					device pnp ff.1 off end
-				end
-				chip superio/smsc/lpc47n217
-					device pnp 4e.3 on	# Parallel
-						io  0x60  = 0x378
-						irq 0x70 = 7
-					end
-					device pnp 4e.4 on	# COM1
-						io  0x60  = 0x3f8
-						irq 0x70 = 4
-					end
-					device pnp 4e.5 off end	# COM2
-				end
-				chip drivers/pc80/tpm
-					device pnp 0c31.0 on end
-				end
-			end
-			device pci 1f.2 on  end	# SATA Controller 1
-			device pci 1f.3 on  end	# SMBus
-			device pci 1f.5 off end	# SATA Controller 2
-			device pci 1f.6 off end	# Thermal
-		end
-	end
-end