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authorDavid Milosevic <David.Milosevic@9elements.com>2024-08-19 14:59:40 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2024-09-27 11:35:23 +0000
commitb29b66c5f5935e0dfab18cca10b69101b75ce508 (patch)
treeef12bd2161cd9c165e22e2ddfaed61a3ed2560b9 /src/mainboard/hardkernel/odroid-h4/Kconfig
parent235c603a330b35418efd562990c7f37fa169f64c (diff)
mb/hardkernel/odroid-h4: Add support for ODROID-H4 series
Add support for the ODROID-H4 family of boards. Tested on an ODROID-H4+ board, but all of them use the same PCB (with different components). The four SATA ports on the mainboard are provided by an onboard ASMedia ASM1064B PCIe-to-SATA bridge. Unlike other mainboards in the tree using an ASMedia ASM1061 or ASM1062 PCIe-to-SATA bridge, the ODROID-H4+ comes with a SPI flash chip for the ASM1064B and does not seem to have issues regarding PCIe power management (e.g. ASPM) or unusable SATA AHCI mode. The ODROID-H4 comes with a single 16 MiB SPI flash chip. The ODROID-H4+ and the ODROID-H4 Ultra feature Dual BIOS, consisting of another 16 MiB SPI flash chip and a 3-pin header to select between them. The board can be flashed internally or using a SOIC-8 clip, but the M.2 slot may need to be empty for the clip to fit. Working: - DDR5 SO-DIMM slot - All SATA ports on ASMedia ASM1064B PCIe-to-SATA controller - UART to emit spam - All video outputs (FSP GOP only lights up one output at a time) - All USB ports (on the Ethernet connectors and on EXT_HDR1) - M.2 M connector (PCIe only) - PCIe power management - Ethernet NICs - eMMC - HD audio codec and display audio - S3 suspend/resume - SeaBIOS <current version> - MrChromebox edk2 <current version> - Super I/O HWM on Linux (using out-of-tree it87 kernel module) - Booting Arch Linux from NVMe and SATA - Booting Windows 10 from NVMe Not working: - PECI: undocumented protocol and undocumented Super I/O - Resuming on Windows 10 BSODs with `VIDEO_TDR_FAILURE` Untested: - Fan curves: may need to lower the temperature limits a bit Change-Id: I7e0d395ba3d15dfcf6d47a222b90499ca371e4eb Signed-off-by: David Milosevic <David.Milosevic@9elements.com> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83979 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/hardkernel/odroid-h4/Kconfig')
-rw-r--r--src/mainboard/hardkernel/odroid-h4/Kconfig41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/hardkernel/odroid-h4/Kconfig b/src/mainboard/hardkernel/odroid-h4/Kconfig
new file mode 100644
index 0000000000..3e03116db7
--- /dev/null
+++ b/src/mainboard/hardkernel/odroid-h4/Kconfig
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+## SPDX-License-Identifier: GPL-2.0-only
+
+if BOARD_HARDKERNEL_ODROID_H4
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select BOARD_ROMSIZE_KB_16384
+ select CRB_TPM
+ select DRIVERS_UART_8250IO
+ select FSP_TYPE_IOT
+ select HAVE_ACPI_RESUME
+ select HAVE_ACPI_TABLES
+ select HAVE_INTEL_PTT
+ select INTEL_GMA_HAVE_VBT
+ select SUPERIO_ITE_IT8613E
+ select SOC_INTEL_ALDERLAKE_PCH_N
+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+ select USE_DDR5
+
+config MAINBOARD_DIR
+ default "hardkernel/odroid-h4"
+
+config MAINBOARD_PART_NUMBER
+ default "ODROID-H4"
+
+config ODROID_H4_ENABLE_SAGV
+ bool "Enable SAGV"
+ default y
+ help
+ SAGV (System Agent GeyserVille) is Intel's implementation of
+ DVFS (Dynamic Voltage Frequency Scaling) that reduces energy
+ consumption of the SA and DRAM during low-load conditions by
+ automatically switching to lower voltages / frequencies when
+ the system load is low enough. When enabled, memory training
+ has to run multiple times (once per SAGV point), which slows
+ down booting (but only when the MRC cache is unusable).
+
+ If unsure, keep enabled. If reflashing often, disabling this
+ option can be useful to reduce memory training time.
+
+endif #BOARD_HARDKERNEL_ODROID_H4