diff options
| author | Alex1 Kao <alex1_kao@pegatron.corp-partner.google.com> | 2021-06-21 17:08:06 +0800 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-06-28 04:25:47 +0000 |
| commit | fa6d31f9997278714d409512b0f77acbf55b32e2 (patch) | |
| tree | 8e7e5ad99a9088136e2461793f487e6d64c0a556 /src/mainboard/google | |
| parent | bf4a8d637234ddcd4256cbc10669e83c53347491 (diff) | |
mb/google/dedede/var/pirika: Update DPTF parameters
Update DPTF parameters from internal thermal team.
BUG=b:190518303
BRANCH=None
TEST=emerge-dedede coreboot
Change-Id: I4005047e0c5f39a12c161a92fbd0afaaec1dc976
Signed-off-by: Alex1 Kao <alex1_kao@pegatron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55716
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Kirk Wang <kirk_wang@pegatron.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/dedede/variants/pirika/overridetree.cb | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/pirika/overridetree.cb b/src/mainboard/google/dedede/variants/pirika/overridetree.cb index 16c07c391d..b7fef8b6e3 100644 --- a/src/mainboard/google/dedede/variants/pirika/overridetree.cb +++ b/src/mainboard/google/dedede/variants/pirika/overridetree.cb @@ -39,9 +39,51 @@ chip soc/intel/jasperlake # USB Port Configuration register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera + register "tcc_offset" = "8" # TCC of 97C device domain 0 on + device pci 04.0 on + # Default DPTF Policy for all Dedede boards if not overridden + chip drivers/intel/dptf + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 72, 60000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 50, 60000) + }" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN) + }" + + ## Power Limits Control + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 5500, + .max_power = 6000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 200, + }, + .pl2 = { + .min_power = 20000, + .max_power = 20000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 1000, + } + }" + + register "options.tsr[0].desc" = ""Charger"" + register "options.tsr[1].desc" = ""Vcore"" + register "options.tsr[2].desc" = ""Ambient"" + + device generic 0 on end + end + end # SA Thermal device device pci 14.0 on chip drivers/usb/acpi device usb 0.0 on |