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authorRaihow Shi <raihow_shi@wistron.corp-partner.google.com>2022-05-31 21:36:20 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-06-10 13:14:39 +0000
commitf9fe704a83df752cb81803382cf99eadfb37fd29 (patch)
treeea661459e91e8af3926c891a3f2249ef0a12d769 /src/mainboard/google
parent463f28852239f58fadf842eff21a9d58cb167774 (diff)
mb/google/brask/variants/moli: correct ddi_ports_config
1. enable DDI_PORT_1, DDI_PORT_3 hot plug detection to let tcp0 and tcp2 can display 2. remove DDI_ENABLE_DDC for Port 2, because tcp-dp dosen't need to enable DDC BUG=b:234521799 TEST=emerge-brask coreboot. Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com> Change-Id: I1354b82d881ebd838c310b32ae28ac2628ab8c9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/64819 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index 6aa0464b49..c9574499bf 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -18,7 +18,9 @@ chip soc/intel/alderlake
register "ddi_ports_config" = "{
[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
- [DDI_PORT_2] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+ [DDI_PORT_1] = DDI_ENABLE_HPD,
+ [DDI_PORT_2] = DDI_ENABLE_HPD,
+ [DDI_PORT_3] = DDI_ENABLE_HPD,
}"
register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2 Port2
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # USB2 Port3