diff options
| author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | 2020-10-12 10:45:35 +0800 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-10-13 06:12:06 +0000 |
| commit | f60ce24ad0fe54566759a433cab1a0564fa40f07 (patch) | |
| tree | f68577e3e4926109b76a90c09853951e1781bf6a /src/mainboard/google | |
| parent | fb256a3c10c9e8b9ca394b2d0d1c0bed97df9cb4 (diff) | |
mb/google/puff/var/dooly: Update devicetree for audio and display configuration
1. Add speaker amplifier ALC1015
2. Enable dmic+ssp registers for speaker and camera DMIC
3. Correct I2C#2 to LVDS, I2C#3 to Touchscreen
BUG=b:170273526
BRANCH=puff
TEST=Build and check DUT function status
Change-Id: I5f6f19b40c6fcce8dca9b010ae97ea6e3eeb1473
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46289
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/hatch/variants/dooly/overridetree.cb | 49 |
1 files changed, 21 insertions, 28 deletions
diff --git a/src/mainboard/google/hatch/variants/dooly/overridetree.cb b/src/mainboard/google/hatch/variants/dooly/overridetree.cb index 21bbc3c592..ee91dd3653 100644 --- a/src/mainboard/google/hatch/variants/dooly/overridetree.cb +++ b/src/mainboard/google/hatch/variants/dooly/overridetree.cb @@ -105,10 +105,6 @@ chip soc/intel/cannonlake # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515" - # Intel HDA - disable I2S Audio SSP1 and DMIC0 as puff variant does not have them. - register "PchHdaAudioLinkSsp1" = "0" - register "PchHdaAudioLinkDmic0" = "0" - # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | @@ -117,10 +113,10 @@ chip soc/intel/cannonlake #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | - #| I2C0 | RFU | - #| I2C2 | PS175 | - #| I2C3 | MST | - #| I2C4 | Audio | + #| I2C0 | ALC 1015 | + #| I2C2 | Lvds | + #| I2C3 | Touchscreen | + #| I2C4 | RT5682 | #+-------------------+---------------------------+ register "common_soc_config" = "{ .gspi[0] = { @@ -299,27 +295,24 @@ chip soc/intel/cannonlake end end # USB xHCI device pci 14.5 off end # SDCard - device pci 15.0 off - # RFU - Reserved for Future Use. - end # I2C #0 - device pci 15.1 off end # I2C #1 - device pci 15.2 on - chip drivers/i2c/generic - register "hid" = ""1AF80175"" - register "name" = ""PS17"" - register "desc" = ""Parade PS175"" - device i2c 4a on end - end - end # I2C #2, PCON PS175. - device pci 15.3 on + device pci 15.0 on chip drivers/i2c/generic - register "hid" = ""10EC2142"" - register "name" = ""RTD2"" - register "desc" = ""Realtek RTD2142"" - device i2c 4a on end - end - end # I2C #3, Realtek RTD2142. - device pci 16.0 on end # Management Engine Interface 1 + register "hid" = ""10EC1015"" + register "desc" = ""Realtek SPK AMP L"" + register "uid" = "0" + device i2c 28 on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1015"" + register "desc" = ""Realtek SPK AMP R"" + register "uid" = "1" + device i2c 29 on end + end + end # I2C #0 ALC1015 + device pci 15.1 off end # I2C #1 + device pci 15.2 on end # I2C #2 LVDS + device pci 15.3 on end # I2C #3 Touchscreen + device pci 16.0 on end # Management Engine Interface 1 device pci 19.0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" |