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authorSubrata Banik <subrata.banik@intel.com>2017-08-22 17:58:02 +0530
committerAaron Durbin <adurbin@chromium.org>2017-08-23 17:56:50 +0000
commitf5fe3590af9a67f9fd3adaee85168d3cac0d84d0 (patch)
treed8f9ff00106fe4d9be702bc1e315592ee2a8daa5 /src/mainboard/google
parent89942a5aa7f7ecd2f9624831783f7d31e6cef791 (diff)
soc/intel/skylake: Usable dram top calculation based on HW registers
This patch ensures that entire system memory calculation is done based on host bridge registers. BRANCH=none BUG=b:63974384 TEST=Build and boot eve and poppy successfully with below configurations 1. Booting to OS with no UPD change 2. Enable ProbelessTrace UPD and boot to OS. 3. Enable PRMRR with size 1MB and boot to OS. 4. Enable PRMRR with size 32MB and boot to OS. 5. Enable PRMRR with size 2MB and unable to boot to OS due to unsupported PRMRR size. Change-Id: I9966cc4f2caa70b9880056193d5a5631493c3f3d Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21150 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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