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authorTony Huang <tony-huang@quanta.corp-partner.google.com>2019-08-20 19:32:36 +0800
committerFurquan Shaikh <furquan@google.com>2019-08-21 02:44:02 +0000
commitf1f2367b80e63701a0ec777bf7441114179885ef (patch)
tree47e76f131b7e80769f956fa168e70f2e2ee85961 /src/mainboard/google
parent6ae8b5034b73712b6c44ff6ee90d7b84bc104b5a (diff)
mb/google/octopus/variants/bloog: Add G2Touch touchscreen support
Add G2Touch touchscreen support for blooglet. BUG=b:139725457 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage, and check touchscreen by evtest. Change-Id: I6ebcc60f58857d8b28446932787742c2740fadd8 Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35013 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/octopus/variants/bloog/overridetree.cb14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/bloog/overridetree.cb b/src/mainboard/google/octopus/variants/bloog/overridetree.cb
index 6c64ba78e0..0212bea46d 100644
--- a/src/mainboard/google/octopus/variants/bloog/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/bloog/overridetree.cb
@@ -138,6 +138,20 @@ chip soc/intel/apollolake
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GTCH7503""
+ register "generic.desc" = ""G2TOUCH Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
+ register "generic.reset_delay_ms" = "50"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
+ register "generic.enable_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "generic.disable_gpio_export_in_crs" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 40 on end
+ end
end # - I2C 7
end