diff options
| author | Robert Chen <robert.chen@quanta.corp-partner.google.com> | 2023-01-06 20:35:07 -0500 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-01-09 06:15:10 +0000 |
| commit | ef485f66ff4899ae94956b2305d40a41f44e6eb7 (patch) | |
| tree | dd364874c7197b9bccb47c631cf33bf057642f1b /src/mainboard/google | |
| parent | 34d2600592fdca303b311a6bb97d64e1c8af8e19 (diff) | |
mb/google/brya/var/lisbon: Update RTL8168 LAN LED config
Adjust LAN LED config to 0x060f.
BUG=b:246657849
TEST=emerge-brask coreboot
Change-Id: Idd5ed2bf7eb4ee5990f2a842cba43f967ae3825e
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71698
Reviewed-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ricky Chang <rickytlchang@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/variants/lisbon/overridetree.cb | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/variants/lisbon/overridetree.cb b/src/mainboard/google/brya/variants/lisbon/overridetree.cb index 86e4b69fbc..6a21f2a7f2 100644 --- a/src/mainboard/google/brya/variants/lisbon/overridetree.cb +++ b/src/mainboard/google/brya/variants/lisbon/overridetree.cb @@ -187,9 +187,7 @@ chip soc/intel/alderlake device ref pcie_rp7 on chip drivers/net register "wake" = "GPE0_DW0_07" - register "led_feature" = "0xe0" - register "customized_led0" = "0x23f" - register "customized_led2" = "0x028" + register "customized_leds" = "0x060f" register "enable_aspm_l1_2" = "1" register "add_acpi_dma_property" = "true" device pci 00.0 on end |