diff options
| author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2023-12-12 10:04:47 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-12-22 12:28:13 +0000 |
| commit | e41bf5f37388bc4cfa96eb84fff5a66766fbd14d (patch) | |
| tree | 98d3f6b58aa786570be6ee4f02d67ceff7828238 /src/mainboard/google | |
| parent | ba07f95992d4a430383696a4654ad222178df242 (diff) | |
mb/google/rex/var/karis: Adjust touchscreen power-on sequence
According to datasheet, EN_TCHSCR_PWR high --> SOC_TCHSCR_RST_R_L high
should over 5ms. And current measure result is 200us.
Set EN_TCHSCR_PWR to output high in bootblock to make it meet datasheet
requirment.
Measurement result of EN_TCHSCR_PWR high --> SOC_TCHSCR_RST_R_L high:
Power on --> 31.7 ms
Resume --> 38.7 ms
BUG=b:314245238
TEST=Measure the sequence
Change-Id: I56e455a980b465f27794b30df058ec0944befc2e
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79571
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/rex/variants/karis/gpio.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/karis/gpio.c b/src/mainboard/google/rex/variants/karis/gpio.c index 646efda5e5..69921a8e38 100644 --- a/src/mainboard/google/rex/variants/karis/gpio.c +++ b/src/mainboard/google/rex/variants/karis/gpio.c @@ -398,6 +398,9 @@ static const struct pad_config early_gpio_table[] = { /* GPP_H10 : [] ==> SOC_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_H10, NONE, LOCK_CONFIG), + + /* GPP_C00 : [] ==> EN_TCHSCR_PWR */ + PAD_CFG_GPO(GPP_C00, 1, DEEP), }; static const struct pad_config romstage_gpio_table[] = { |