diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-11-03 22:52:04 +0100 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-11-09 15:47:04 +0000 |
| commit | d92bb3c3f1447e6731a9694f16338c48e5d9f954 (patch) | |
| tree | bc85c91a0f6a2377d60b6e9234637730d0c17a21 /src/mainboard/google | |
| parent | 600fa266bdc8740126420e63579a5b9d103ca960 (diff) | |
soc/amd/picasso/acpi: rename pcie.asl to pci_int_defs.asl
This aligns Picasso more with the newer AMD SoCs and also makes it a bit
clearer what this file does. Also remove the unneeded tabs at the
beginning of each line.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie6e5ee815e4346004bc864a6111a255dc689eae8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69187
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/zork/dsdt.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/zork/dsdt.asl b/src/mainboard/google/zork/dsdt.asl index 3a92fe18ed..732ebeafbb 100644 --- a/src/mainboard/google/zork/dsdt.asl +++ b/src/mainboard/google/zork/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock ( #include <globalnvs.asl> /* PCI IRQ mapping for the Southbridge */ - #include <pcie.asl> + #include <pci_int_defs.asl> /* Power state notification to ALIB */ #include <pnot.asl> |