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authorNico Huber <nico.h@gmx.de>2019-11-17 00:42:57 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 11:49:27 +0000
commitce20697513b1a6455c743aef43d40f91b0085af9 (patch)
tree760a0d77a4263f531dc9dd7ca88494e5964ae483 /src/mainboard/google
parent8d6d3fa109ca6895008639e12b0eb48d700e8665 (diff)
mb/compulab/intense_pc: Clean PCH and super-i/o config up
The generic PCH code already enables a superset of LPC decoding. Move UART setup to bootblock_mainboard_early_init() where it is expected. Last but not least, remove an odd write to BUCs (RCBA+0x3414) and beyond, as it's an 8-bit register and shouldn't be bluntly zeroed. Change-Id: I24a4ccf6a529460a83f48522d2e05e6ad6614f81 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36888 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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