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authorDuncan Laurie <dlaurie@chromium.org>2013-08-08 15:33:34 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 12:02:28 +0100
commitc45dc1c08131dfaf5f8a26927b40006660c1ebf6 (patch)
tree4ae150e48405b3b9b5c5c27c13c42ee9d2d71125 /src/mainboard/google
parent0dc0d1383df258bbb18dec18e0bf7e00dfda1651 (diff)
falco: Disable unused clocks
CLKOUT for PCIE ports 1-5 and CLKOUT_XDP are not used and can be disabled. I couldn't test this directly without a scope so instead I used a modified commit that also disabled PCIe Port 0 and saw that that correctly disabled the WLAN port. Change-Id: I0f996e90f0ae42780de3a0c8dc5db00ec600748b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65251 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4451 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/falco/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/falco/devicetree.cb b/src/mainboard/google/falco/devicetree.cb
index 4e75c92948..3823ce7d92 100644
--- a/src/mainboard/google/falco/devicetree.cb
+++ b/src/mainboard/google/falco/devicetree.cb
@@ -74,6 +74,9 @@ chip northbridge/intel/haswell
register "sio_i2c0_voltage" = "0" # 3.3V
register "sio_i2c1_voltage" = "0" # 3.3V
+ # Disable PCIe CLKOUT 1-5 and CLKOUT_XDP
+ register "icc_clock_disable" = "0x013e0000"
+
device pci 13.0 off end # Smart Sound Audio DSP
device pci 14.0 on end # USB3 XHCI
device pci 15.0 on end # Serial I/O DMA