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authorXi Chen <xixi.chen@mediatek.com>2022-07-28 13:45:18 +0800
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-08-27 15:54:53 +0000
commitbcaa87d603441b74b7f1cf504bf7cb03aa8dafc9 (patch)
tree3d1452b26627692fb833fe6d128d9af3aec972e2 /src/mainboard/google
parent22ce1e80af945d0d24ce70b0bc7761e0df6512b0 (diff)
mb/google/geralt: Fully calibrate DRAM
Initialize and calibrate DRAM in romstage. DRAM full calibration logs: dram_init: dram init end (result: 0) DRAM-K: Full calibration passed in 50176 msecs TEST=Full calibration pass. BUG=b:233720142 Signed-off-by: Xi Chen <xixi.chen@mediatek.com> Change-Id: I31f5693ffe4a1e30defbc8a96dc128de03d6b7e7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66278 Reviewed-by: Yidi Lin <yidilin@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/geralt/Makefile.inc1
-rw-r--r--src/mainboard/google/geralt/romstage.c2
-rw-r--r--src/mainboard/google/geralt/sdram_configs.c15
3 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/geralt/Makefile.inc b/src/mainboard/google/geralt/Makefile.inc
index fc1a62648a..717ba16688 100644
--- a/src/mainboard/google/geralt/Makefile.inc
+++ b/src/mainboard/google/geralt/Makefile.inc
@@ -9,6 +9,7 @@ verstage-y += reset.c
romstage-y += memlayout.ld
romstage-y += chromeos.c
romstage-y += romstage.c
+romstage-y += sdram_configs.c
ramstage-y += memlayout.ld
ramstage-y += boardid.c
diff --git a/src/mainboard/google/geralt/romstage.c b/src/mainboard/google/geralt/romstage.c
index 0f04021bde..8f248ca8a6 100644
--- a/src/mainboard/google/geralt/romstage.c
+++ b/src/mainboard/google/geralt/romstage.c
@@ -2,6 +2,7 @@
#include <arch/stages.h>
#include <soc/clkbuf.h>
+#include <soc/emi.h>
#include <soc/mt6315.h>
#include <soc/mt6359p.h>
#include <soc/pmif.h>
@@ -14,4 +15,5 @@ void platform_romstage_main(void)
mt6359p_init();
clk_buf_init();
rtc_boot();
+ mtk_dram_init();
}
diff --git a/src/mainboard/google/geralt/sdram_configs.c b/src/mainboard/google/geralt/sdram_configs.c
new file mode 100644
index 0000000000..c4766be235
--- /dev/null
+++ b/src/mainboard/google/geralt/sdram_configs.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+const struct sdram_info *get_sdram_config(void)
+{
+ /*
+ * The MT8188 platform supports "dram adaptive" feature to automatically
+ * detect dram information, including channel, rank, die size..., and
+ * can automatically configure EMI settings. Therefore, we will be
+ * passing a placeholder param blob.
+ */
+ static struct sdram_info params;
+ return &params;
+}