haswell boards: Correct USB config indentation

Change-Id: I72b717a41c5611cf578ce178722029b8646cbb35
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50539
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

5 files changed, 130 insertions, 130 deletions

diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index f009f5abe1..dda2edc8d5 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -46,30 +46,30 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[2] = 0xa4;
 }
 
-	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
-		/* Length, Enable, OCn#, Location */
-		{ 0x0064, 1, 0,               /* P0: VP8 */
-		  USB_PORT_MINI_PCIE },
-		{ 0x0040, 1, 0,               /* P1: Port A, CN22 */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, 1,		      /* P2: Port B, CN23 */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: WLAN */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, 2,		      /* P4: Port C, CN25 */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, 2,		      /* P5: Port D, CN25 */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: Card Reader */
-		  USB_PORT_INTERNAL },
-		{ 0x0000, 0, 0,               /* P7: N/C */
-		  USB_PORT_SKIP },
-	};
+const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
+	/* Length, Enable, OCn#, Location */
+	{ 0x0064, 1, 0,               /* P0: VP8 */
+	  USB_PORT_MINI_PCIE },
+	{ 0x0040, 1, 0,               /* P1: Port A, CN22 */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, 1,		      /* P2: Port B, CN23 */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: WLAN */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, 2,		      /* P4: Port C, CN25 */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, 2,		      /* P5: Port D, CN25 */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: Card Reader */
+	  USB_PORT_INTERNAL },
+	{ 0x0000, 0, 0,               /* P7: N/C */
+	  USB_PORT_SKIP },
+};
 
-	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
-		/* Enable, OCn# */
-		{ 1, 0 }, /* P1; CN22 */
-		{ 1, 1 }, /* P2; CN23  */
-		{ 1, 2 }, /* P3; CN25 */
-		{ 1, 2 }, /* P4; CN25 */
-	};
+const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
+	/* Enable, OCn# */
+	{ 1, 0 }, /* P1; CN22 */
+	{ 1, 1 }, /* P2; CN23  */
+	{ 1, 2 }, /* P3; CN25 */
+	{ 1, 2 }, /* P4; CN25 */
+};
diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c
index de0ac76334..8870faed2d 100644
--- a/src/mainboard/google/slippy/variants/falco/romstage.c
+++ b/src/mainboard/google/slippy/variants/falco/romstage.c
@@ -48,30 +48,30 @@ void copy_spd(struct pei_data *peid)
 	}
 }
 
-	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
-		/* Length, Enable, OCn#, Location */
-		{ 0x0064, 1, 0,               /* P0: Port A, CN8 */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0052, 1, 0,               /* P1: Port B, CN9  */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P2: CCD */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P4: LTE */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P5: TOUCH */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SD Card */
-		  USB_PORT_INTERNAL },
-		{ 0x0123, 1, 3,               /* P7: USB2 Port */
-		  USB_PORT_INTERNAL },
-	};
+const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
+	/* Length, Enable, OCn#, Location */
+	{ 0x0064, 1, 0,               /* P0: Port A, CN8 */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0052, 1, 0,               /* P1: Port B, CN9  */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P2: CCD */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P4: LTE */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P5: TOUCH */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SD Card */
+	  USB_PORT_INTERNAL },
+	{ 0x0123, 1, 3,               /* P7: USB2 Port */
+	  USB_PORT_INTERNAL },
+};
 
-	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
-		/* Enable, OCn# */
-		{ 1, 0               }, /* P1; Port A, CN8 */
-		{ 1, 0               }, /* P2; Port B, CN9  */
-		{ 0, USB_OC_PIN_SKIP }, /* P3; */
-		{ 0, USB_OC_PIN_SKIP }, /* P4; */
-	};
+const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
+	/* Enable, OCn# */
+	{ 1, 0               }, /* P1; Port A, CN8 */
+	{ 1, 0               }, /* P2; Port B, CN9  */
+	{ 0, USB_OC_PIN_SKIP }, /* P3; */
+	{ 0, USB_OC_PIN_SKIP }, /* P4; */
+};
diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c
index daf0c16604..49961d93df 100644
--- a/src/mainboard/google/slippy/variants/leon/romstage.c
+++ b/src/mainboard/google/slippy/variants/leon/romstage.c
@@ -44,30 +44,30 @@ void copy_spd(struct pei_data *peid)
 			spd_file + (spd_index * spd_len), spd_len);
 }
 
-	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
-		/* Length, Enable, OCn#, Location */
-		{ 0x0040, 1, 0,               /* P0: Port A, CN10 */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0040, 1, 2,               /* P1: Port B, CN11 */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
-		  USB_PORT_MINI_PCIE },
-		{ 0x0080, 1, USB_OC_PIN_SKIP, /* P4: SD Card */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P5: LTE */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SIM CARD */
-		  USB_PORT_FLEX },
-		{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
-		  USB_PORT_SKIP },
-	};
+const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
+	/* Length, Enable, OCn#, Location */
+	{ 0x0040, 1, 0,               /* P0: Port A, CN10 */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0040, 1, 2,               /* P1: Port B, CN11 */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
+	  USB_PORT_MINI_PCIE },
+	{ 0x0080, 1, USB_OC_PIN_SKIP, /* P4: SD Card */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P5: LTE */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SIM CARD */
+	  USB_PORT_FLEX },
+	{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
+	  USB_PORT_SKIP },
+};
 
-	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
-		/* Enable, OCn# */
-		{ 1, 0               }, /* P1; Port A, CN10 */
-		{ 1, 2               }, /* P2; Port B, CN11 */
-		{ 0, USB_OC_PIN_SKIP }, /* P3; */
-		{ 0, USB_OC_PIN_SKIP }, /* P4; */
-	};
+const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
+	/* Enable, OCn# */
+	{ 1, 0               }, /* P1; Port A, CN10 */
+	{ 1, 2               }, /* P2; Port B, CN11 */
+	{ 0, USB_OC_PIN_SKIP }, /* P3; */
+	{ 0, USB_OC_PIN_SKIP }, /* P4; */
+};
diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c
index 535c07b778..8a3486a72c 100644
--- a/src/mainboard/google/slippy/variants/peppy/romstage.c
+++ b/src/mainboard/google/slippy/variants/peppy/romstage.c
@@ -62,30 +62,30 @@ void copy_spd(struct pei_data *peid)
 	}
 }
 
-	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
-		/* Length, Enable, OCn#, Location */
-		{ 0x0150, 1, USB_OC_PIN_SKIP, /* P0: LTE */
-		  USB_PORT_MINI_PCIE },
-		{ 0x0040, 1, 0,               /* P1: Port A, CN10 */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
-		  USB_PORT_MINI_PCIE },
-		{ 0x0040, 1, 2,               /* P4: Port B, CN6  */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0000, 0, USB_OC_PIN_SKIP, /* P5: EMPTY */
-		  USB_PORT_SKIP },
-		{ 0x0150, 1, USB_OC_PIN_SKIP, /* P6: SD Card */
-		  USB_PORT_FLEX },
-		{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
-		  USB_PORT_SKIP },
-	};
+const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
+	/* Length, Enable, OCn#, Location */
+	{ 0x0150, 1, USB_OC_PIN_SKIP, /* P0: LTE */
+	  USB_PORT_MINI_PCIE },
+	{ 0x0040, 1, 0,               /* P1: Port A, CN10 */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
+	  USB_PORT_MINI_PCIE },
+	{ 0x0040, 1, 2,               /* P4: Port B, CN6  */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0000, 0, USB_OC_PIN_SKIP, /* P5: EMPTY */
+	  USB_PORT_SKIP },
+	{ 0x0150, 1, USB_OC_PIN_SKIP, /* P6: SD Card */
+	  USB_PORT_FLEX },
+	{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
+	  USB_PORT_SKIP },
+};
 
-	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
-		/* Enable, OCn# */
-		{ 1, 0               }, /* P1; Port A, CN6 */
-		{ 0, USB_OC_PIN_SKIP }, /* P2; */
-		{ 0, USB_OC_PIN_SKIP }, /* P3; */
-		{ 0, USB_OC_PIN_SKIP }, /* P4; */
-	};
+const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
+	/* Enable, OCn# */
+	{ 1, 0               }, /* P1; Port A, CN6 */
+	{ 0, USB_OC_PIN_SKIP }, /* P2; */
+	{ 0, USB_OC_PIN_SKIP }, /* P3; */
+	{ 0, USB_OC_PIN_SKIP }, /* P4; */
+};
diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c
index 40ff9c2253..9080f46c49 100644
--- a/src/mainboard/google/slippy/variants/wolf/romstage.c
+++ b/src/mainboard/google/slippy/variants/wolf/romstage.c
@@ -48,30 +48,30 @@ void copy_spd(struct pei_data *peid)
 	}
 }
 
-	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
-		/* Length, Enable, OCn#, Location */
-		{ 0x0040, 1, 0,               /* P0: Port A, CN10 */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0040, 1, 2,               /* P1: Port B, CN11  */
-		  USB_PORT_BACK_PANEL },
-		{ 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */
-		  USB_PORT_INTERNAL },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
-		  USB_PORT_MINI_PCIE },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P4: LTE */
-		  USB_PORT_INTERNAL },
-		{ 0x0000, 1, USB_OC_PIN_SKIP, /* P5: EMPTY */
-		  USB_PORT_SKIP },
-		{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SD Card */
-		  USB_PORT_INTERNAL },
-		{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
-		  USB_PORT_SKIP  },
-	};
+const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
+	/* Length, Enable, OCn#, Location */
+	{ 0x0040, 1, 0,               /* P0: Port A, CN10 */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0040, 1, 2,               /* P1: Port B, CN11  */
+	  USB_PORT_BACK_PANEL },
+	{ 0x0080, 1, USB_OC_PIN_SKIP, /* P2: CCD */
+	  USB_PORT_INTERNAL },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P3: BT */
+	  USB_PORT_MINI_PCIE },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P4: LTE */
+	  USB_PORT_INTERNAL },
+	{ 0x0000, 1, USB_OC_PIN_SKIP, /* P5: EMPTY */
+	  USB_PORT_SKIP },
+	{ 0x0040, 1, USB_OC_PIN_SKIP, /* P6: SD Card */
+	  USB_PORT_INTERNAL },
+	{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
+	  USB_PORT_SKIP  },
+};
 
-	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
-		/* Enable, OCn# */
-		{ 1, 0               }, /* P1; Port A, CN10 */
-		{ 1, 2               }, /* P2; Port B, CN11  */
-		{ 0, USB_OC_PIN_SKIP }, /* P3; */
-		{ 0, USB_OC_PIN_SKIP }, /* P4; */
-	};
+const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
+	/* Enable, OCn# */
+	{ 1, 0               }, /* P1; Port A, CN10 */
+	{ 1, 2               }, /* P2; Port B, CN11  */
+	{ 0, USB_OC_PIN_SKIP }, /* P3; */
+	{ 0, USB_OC_PIN_SKIP }, /* P4; */
+};