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authorPhilip Chen <philipchen@google.com>2017-08-23 18:02:25 -0700
committerJulius Werner <jwerner@chromium.org>2017-08-31 20:03:07 +0000
commita0618201d42f4cba1b25ecda9bc11ca41511c206 (patch)
treead9656fdeb11ceb425d92b1c0f671ac5e5325312 /src/mainboard/google
parent662cf7f8a6aefbda084a578ce101e3a8943358b2 (diff)
google/gru: Support Nefario rev0
Do not assert GPIO1_B3 otherwise BT would be disabled on Nefario. Also, remove DVS support for CENTERLOGIC. BUG=b:64702054, b:63537905 TEST=build coreboot Change-Id: I350db2c080f2e41ae56413f5f895557978ef0ba8 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://review.coreboot.org/21176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/gru/Kconfig10
-rw-r--r--src/mainboard/google/gru/board.h8
-rw-r--r--src/mainboard/google/gru/mainboard.c5
-rw-r--r--src/mainboard/google/gru/pwm_regulator.c9
-rw-r--r--src/mainboard/google/gru/romstage.c8
5 files changed, 30 insertions, 10 deletions
diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig
index b66dab48df..5eb35d49a5 100644
--- a/src/mainboard/google/gru/Kconfig
+++ b/src/mainboard/google/gru/Kconfig
@@ -25,6 +25,16 @@ config GRU_HAS_TPM2
default n if BOARD_GOOGLE_KEVIN
default y
+config GRU_HAS_CENTERLOG_PWM
+ bool
+ default y if BOARD_GOOGLE_GRU || BOARD_GOOGLE_KEVIN || BOARD_GOOGLE_BOB
+ default n
+
+config GRU_HAS_WLAN_RESET
+ bool
+ default y if BOARD_GOOGLE_GRU || BOARD_GOOGLE_KEVIN || BOARD_GOOGLE_BOB
+ default n
+
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ID_AUTO
diff --git a/src/mainboard/google/gru/board.h b/src/mainboard/google/gru/board.h
index f240dcf0ab..cc7581da65 100644
--- a/src/mainboard/google/gru/board.h
+++ b/src/mainboard/google/gru/board.h
@@ -33,7 +33,6 @@
#define GPIO_P30V_EN dead_code_t(gpio_t, "PP3000 doesn't exist on Scarlet")
#define GPIO_TP_RST_L dead_code_t(gpio_t, "don't need TP_RST_L on Scarlet")
#define GPIO_TPM_IRQ GPIO(1, C, 1)
-#define GPIO_WLAN_RST_L dead_code_t(gpio_t, "no WLAN reset on Scarlet in FW")
#define GPIO_WP GPIO(0, B, 5)
#else
#define GPIO_BACKLIGHT GPIO(1, C, 1)
@@ -44,10 +43,15 @@
#define GPIO_P30V_EN GPIO(0, B, 4)
#define GPIO_TP_RST_L GPIO(3, B, 4) /* may also be an I2C pull-up enable */
#define GPIO_TPM_IRQ GPIO(0, A, 5)
-#define GPIO_WLAN_RST_L GPIO(1, B, 3)
#define GPIO_WP GPIO(1, C, 2)
#endif
+#if IS_ENABLED(CONFIG_GRU_HAS_WLAN_RESET)
+#define GPIO_WLAN_RST_L GPIO(1, B, 3)
+#else
+#define GPIO_WLAN_RST_L dead_code_t(gpio_t, "no WLAN reset on this board in FW")
+#endif
+
void setup_chromeos_gpios(void);
#endif /* ! __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H */
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index 77c185cb3d..df3df4fcae 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -44,7 +44,7 @@ static void configure_touchpad(void)
/*
* Wifi's PDN/RST line is pulled down by its (unpowered) voltage rails, but
* this reset pin is pulled up by default. Let's drive it low as early as we
- * can. Scarlet uses a different WiFi chip that doesn't have this pin anymore.
+ * can. This only applies to boards with Marvell 8997 WiFi.
*/
static void assert_wifi_reset(void)
{
@@ -349,8 +349,9 @@ static void mainboard_init(device_t dev)
if (display_init_required())
configure_display();
setup_usb(0);
+ if (IS_ENABLED(CONFIG_GRU_HAS_WLAN_RESET))
+ assert_wifi_reset();
if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) {
- assert_wifi_reset(); /* Scarlet: no WIFI_PD# line */
configure_touchpad(); /* Scarlet: works differently */
setup_usb(1); /* Scarlet: only one USB port */
register_gpio_suspend(); /* Scarlet: all EC-controlled */
diff --git a/src/mainboard/google/gru/pwm_regulator.c b/src/mainboard/google/gru/pwm_regulator.c
index 3ee74a4426..6a9f1714e8 100644
--- a/src/mainboard/google/gru/pwm_regulator.c
+++ b/src/mainboard/google/gru/pwm_regulator.c
@@ -40,7 +40,7 @@ int kevin6_pwm_design_voltage[][2] = {
[PWM_REGULATOR_CENTERLOG] = {8001, 10497}
};
-/* Applies for Gru rev2+ and Bob. */
+/* Applies for Gru rev2+, Bob, and Nefario. */
int pwm_design_voltage[][2] = {
[PWM_REGULATOR_GPU] = {7864, 12177},
[PWM_REGULATOR_BIG] = {8001, 13022},
@@ -58,12 +58,15 @@ int scarlet_pwm_design_voltage[][2] = {
int pwm_enum_to_pwm_number[] = {
[PWM_REGULATOR_GPU] = 0,
[PWM_REGULATOR_LIT] = 2,
+#if IS_ENABLED(CONFIG_GRU_HAS_CENTERLOG_PWM)
+ [PWM_REGULATOR_CENTERLOG] = 3,
+#else
+ [PWM_REGULATOR_CENTERLOG] = -1,
+#endif
#if IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)
[PWM_REGULATOR_BIG] = 3,
- [PWM_REGULATOR_CENTERLOG] = -1, /* fixed regulator on Scarlet */
#else
[PWM_REGULATOR_BIG] = 1,
- [PWM_REGULATOR_CENTERLOG] = 3,
#endif
};
diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c
index bde61b28aa..9f938f3eb2 100644
--- a/src/mainboard/google/gru/romstage.c
+++ b/src/mainboard/google/gru/romstage.c
@@ -41,11 +41,13 @@ static void init_dvs_outputs(void)
pwm_regulator_configure(PWM_REGULATOR_GPU, 900);
pwm_regulator_configure(PWM_REGULATOR_BIG, 900);
- /* Kevin's logic rail has some ripple, so up the voltage a bit. Scarlet
- uses a fixed 900mV regulator for centerlogic. */
+ /*
+ * Kevin's logic rail has some ripple, so up the voltage a bit. Newer
+ * boards use a fixed 900mV regulator for centerlogic.
+ */
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN))
pwm_regulator_configure(PWM_REGULATOR_CENTERLOG, 925);
- else if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+ else if (IS_ENABLED(CONFIG_GRU_HAS_CENTERLOG_PWM))
pwm_regulator_configure(PWM_REGULATOR_CENTERLOG, 900);
/* Allow time for the regulators to settle */