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authorWon Chung <wonchung@google.com>2022-02-02 22:30:53 +0000
committerSubrata Banik <subratabanik@google.com>2022-02-09 08:02:56 +0000
commit9c5a10714da47f9ace52d2b35d083c7202a246af (patch)
tree4781f49ebc5bd1bfa77cd69b173a8fdc5c9aead8 /src/mainboard/google
parentc5ab260cbdcf73c8c8b3e779649dd3d23039f641 (diff)
mb/google/brya: Add custom PLD fields to devicetree for brya variants
BUG=b:216490477 TEST=emerge-brya coreboot Signed-off-by: Won Chung <wonchung@google.com> Change-Id: If610e6b3c849d982345ed1b8607ffd2af105dc51 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/anahera/overridetree.cb64
-rw-r--r--src/mainboard/google/brya/variants/anahera4es/overridetree.cb64
-rw-r--r--src/mainboard/google/brya/variants/felwinter/overridetree.cb48
-rw-r--r--src/mainboard/google/brya/variants/gimble/overridetree.cb48
-rw-r--r--src/mainboard/google/brya/variants/gimble4es/overridetree.cb48
-rw-r--r--src/mainboard/google/brya/variants/kano/overridetree.cb48
-rw-r--r--src/mainboard/google/brya/variants/primus/overridetree.cb64
-rw-r--r--src/mainboard/google/brya/variants/primus4es/overridetree.cb64
-rw-r--r--src/mainboard/google/brya/variants/redrix/overridetree.cb48
-rw-r--r--src/mainboard/google/brya/variants/redrix4es/overridetree.cb48
-rw-r--r--src/mainboard/google/brya/variants/taeko/overridetree.cb48
-rw-r--r--src/mainboard/google/brya/variants/taeko4es/overridetree.cb48
12 files changed, 560 insertions, 80 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb
index e670f4a0da..d2b4ea14da 100644
--- a/src/mainboard/google/brya/variants/anahera/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb
@@ -301,13 +301,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -319,19 +331,37 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 2)}"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -347,7 +377,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (DB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -360,13 +396,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (DB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 2)}"
device ref usb3_port3 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
index e04ff886a7..e383f17ced 100644
--- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
@@ -293,13 +293,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -311,19 +323,37 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 2)}"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -339,7 +369,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (DB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -352,13 +388,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (DB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 2)}"
device ref usb3_port3 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
index f936c4bdcd..a493be1469 100644
--- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb
+++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
@@ -327,13 +327,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -345,13 +357,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -362,7 +386,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -375,7 +405,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb3_port1 on end
end
end
diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb
index 408d380ce2..88f4b07f17 100644
--- a/src/mainboard/google/brya/variants/gimble/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb
@@ -264,13 +264,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -282,13 +294,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
@@ -300,7 +324,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
@@ -313,7 +343,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port2 on end
end
end
diff --git a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb
index 0dd8c75934..7cfcdb2411 100644
--- a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb
@@ -232,13 +232,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -250,13 +262,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
@@ -268,7 +292,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
@@ -281,7 +311,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port2 on end
end
end
diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb
index 212173758b..d142257b00 100644
--- a/src/mainboard/google/brya/variants/kano/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kano/overridetree.cb
@@ -511,13 +511,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -529,13 +541,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -548,7 +572,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -561,7 +591,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb3_port1 on end
end
end
diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb
index a12de65622..6d4522bba0 100644
--- a/src/mainboard/google/brya/variants/primus/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus/overridetree.cb
@@ -318,13 +318,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -336,13 +348,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -358,13 +382,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -377,13 +413,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port2 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/primus4es/overridetree.cb b/src/mainboard/google/brya/variants/primus4es/overridetree.cb
index dc0dfbfb22..d4f7237423 100644
--- a/src/mainboard/google/brya/variants/primus4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus4es/overridetree.cb
@@ -312,13 +312,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -330,13 +342,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_CENTER,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -352,13 +376,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -371,13 +407,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(1, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(1, 2)}"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port2 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index 0698568495..b29e42e574 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -473,13 +473,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -491,13 +503,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -513,7 +537,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -526,7 +556,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
index fc939c7335..40cc0cd6a2 100644
--- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
@@ -459,13 +459,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref tcss_usb3_port3 on end
end
end
@@ -477,13 +489,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -499,7 +523,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -512,7 +542,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb
index 05eca506be..2bddcd7c93 100644
--- a/src/mainboard/google/brya/variants/taeko/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb
@@ -454,13 +454,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
end
@@ -474,13 +486,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
end
@@ -494,7 +518,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -507,7 +537,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port1 on end
end
end
diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
index 80aaad5323..569f223995 100644
--- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
@@ -440,13 +440,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
end
@@ -460,13 +472,25 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(1, 1)}"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_RIGHT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_OVAL,
+ .group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
end
@@ -480,7 +504,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -493,7 +523,13 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(4, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "{
+ .visible = true,
+ .panel = PLD_PANEL_LEFT,
+ .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
+ .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
+ .group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port1 on end
end
end