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authorScott Chao <scott_chao@wistron.corp-partner.google.com>2021-07-24 16:28:51 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-08-03 20:50:45 +0000
commit8ca68cf2ae8d172c237cf05d37f2b5c5a2775f9f (patch)
tree103b58f82ec1cac658edcf339d65924810da8785 /src/mainboard/google
parentbc35bed18eba2526bc296cf12e972011bb85613d (diff)
mb/google/brya/variants/primus: configure correct type-c port
BUG=b:195274799 TEST=USE="project_primus" emerge-brya coreboot and verify it builds without error. Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: I4abf7b2d98b188735ef79f8ffbee4c02099ec021 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56583 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/primus/overridetree.cb8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb
index 097f1ef914..9fae0f9277 100644
--- a/src/mainboard/google/brya/variants/primus/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus/overridetree.cb
@@ -282,7 +282,6 @@ chip soc/intel/alderlake
chip ec/google/chromeec
use conn0 as mux_conn[0]
use conn1 as mux_conn[1]
- use conn2 as mux_conn[2]
device pnp 0c09.0 on end
end
end
@@ -294,15 +293,10 @@ chip soc/intel/alderlake
register "usb3_port_number" = "1"
device generic 0 alias conn0 on end
end
- chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "2"
- register "usb3_port_number" = "2"
- device generic 1 alias conn1 on end
- end
chip drivers/intel/pmc_mux/conn
register "usb2_port_number" = "3"
register "usb3_port_number" = "3"
- device generic 2 alias conn2 on end
+ device generic 1 alias conn1 on end
end
end
end