diff options
| author | Matt Papageorge <matthewpapa07@gmail.com> | 2021-11-01 16:39:47 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-11-04 10:31:27 +0000 |
| commit | 7d6b4e3ae5729b48d8a4bf68087c5587093811f2 (patch) | |
| tree | b795893896b738a7ee85af5211f1329b4ae8a135 /src/mainboard/google | |
| parent | a3260fde92431530d68b894d1c2723ef5eea9cc3 (diff) | |
mb/google/guybrush: Set Gen3 default for all PCIe devices
Currently link_speed_capability is not specified within the DXIO
descriptors sent to FSP. This value specifies the maximum speed that
a PCIe device should train up to. The only device on Monkey Island that
is not currently running at full speed is the NVME but this may not
always be the case.
BUG=b:204791296
TEST=Boot to OS and check link speed with LSPCI to verify
NVME link speed goes from 2.5 GT/s to 5 GT/s
Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/guybrush/port_descriptors.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index a98983b6bc..af06e7f3ed 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -14,6 +14,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 0, .end_logical_lane = 0, + .link_speed_capability = 3, .device_number = PCI_SLOT(WLAN_DEVFN), .function_number = PCI_FUNC(WLAN_DEVFN), .link_aspm = ASPM_L1, @@ -28,6 +29,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 1, .end_logical_lane = 1, + .link_speed_capability = 3, .device_number = PCI_SLOT(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN), .link_aspm = ASPM_L1, @@ -43,6 +45,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 2, .end_logical_lane = 2, + .link_speed_capability = 3, .device_number = PCI_SLOT(WWAN_DEVFN), .function_number = PCI_FUNC(WWAN_DEVFN), .link_aspm = ASPM_L1, @@ -57,6 +60,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = { .port_present = true, .start_logical_lane = 4, .end_logical_lane = 7, + .link_speed_capability = 3, .device_number = PCI_SLOT(NVME_DEVFN), .function_number = PCI_FUNC(NVME_DEVFN), .link_aspm = ASPM_L1, |