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authorWeimin Wu <wuweimin@huaqin.corp-partner.google.com>2023-11-18 12:19:46 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-12-01 16:36:06 +0000
commit7ac0b43671bb0de48ab27f308aa7a2e6e8526c26 (patch)
treea8592a90e7da5ae87081edd7bed277a2a507b37b /src/mainboard/google
parent10db71310041e511660e0e80e0b3b4723a697996 (diff)
mb/google/nissa/var/anraggar: Fix Type-C & DP functions
Due to TCPC0 & TCPC1 exchanged compare to Neried design, but related USB2 Ports not exchanged. BUG=b:304920262 TEST=Tpye-C & DP functions workable Change-Id: I9dacf06b1e672575a684856acdb10b6c88360b18 Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79165 Reviewed-by: Dolan Liu <liuyong5@huaqin.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/anraggar/overridetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
index 5308317922..b4b16599be 100644
--- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
@@ -366,8 +366,8 @@ chip soc/intel/alderlake
end
device ref pch_espi on
chip ec/google/chromeec
- use conn0 as mux_conn[0]
- use conn1 as mux_conn[1]
+ use conn0 as mux_conn[1]
+ use conn1 as mux_conn[0]
device pnp 0c09.0 on end
end
end
@@ -375,12 +375,12 @@ chip soc/intel/alderlake
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
- use usb2_port1 as usb2_port
+ use usb2_port2 as usb2_port
use tcss_usb3_port1 as usb3_port
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
- use usb2_port2 as usb2_port
+ use usb2_port1 as usb2_port
use tcss_usb3_port2 as usb3_port
device generic 1 alias conn1 on end
end