diff options
| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2022-06-20 16:54:13 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-07 13:06:35 +0000 |
| commit | 6aadb93355a4c883369a53ab0d2eef8f61bd1a70 (patch) | |
| tree | 4b9aee5a38b9e48a46e98a7b3ca0ef5444d1c6fa /src/mainboard/google | |
| parent | f136ddb9fa1ecc80f64a218f36f275583d903584 (diff) | |
mb/google/brya/var/kinox: Support DPTF oem_variables
Enable DPTF oem_variables and override based on charger type.
BUG=b:230803675
TEST=1. With 90W adapter, check ACPI object ODVX and oem_variable[0]=1
Name (ODVX, Package (0x06)
{
0x00000001,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000
})
2. With 65W adapter, check ACPI object ODVX and oem_variable[0]=0
Name (ODVX, Package (0x06)
{
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000
})
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I78929ecbc9db56aa234b3f46c641d1f2f3b7cba8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/variants/kinox/overridetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/kinox/ramstage.c | 19 |
2 files changed, 23 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/kinox/overridetree.cb b/src/mainboard/google/brya/variants/kinox/overridetree.cb index 7649064c48..bcf322b225 100644 --- a/src/mainboard/google/brya/variants/kinox/overridetree.cb +++ b/src/mainboard/google/brya/variants/kinox/overridetree.cb @@ -177,6 +177,10 @@ chip soc/intel/alderlake } }" + register "oem_data.oem_variables" = "{ + [0] = 0x0 + }" + ## Charger Performance Control (Control, mA) register "controls.charger_perf" = "{ [0] = { 255, 1700 }, diff --git a/src/mainboard/google/brya/variants/kinox/ramstage.c b/src/mainboard/google/brya/variants/kinox/ramstage.c index 6df88c28df..3063c62a53 100644 --- a/src/mainboard/google/brya/variants/kinox/ramstage.c +++ b/src/mainboard/google/brya/variants/kinox/ramstage.c @@ -6,9 +6,12 @@ #include <device/device.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <drivers/intel/dptf/chip.h> #include <ec/google/chromeec/ec.h> #include <intelblocks/power_limit.h> +WEAK_DEV_PTR(dptf_policy); + const struct cpu_power_limits baseline_limits[] = { /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */ { PCI_DID_INTEL_ADL_P_ID_10, 15, 12000, 25000, 39000, 39000, 72500 }, @@ -79,6 +82,20 @@ const struct psys_config psys_config = { .bj_volts_mv = 20000 }; +static void update_oem_variables_perf(void) +{ + const struct device *policy_dev; + struct drivers_intel_dptf_config *config; + + policy_dev = DEV_PTR(dptf_policy); + if (!policy_dev) + return; + + config = policy_dev->chip_info; + config->oem_data.oem_variables[0] = 1; + printk(BIOS_INFO, "PL124: Update oem_variables to Performance value.\n"); +} + static const struct cpu_power_limits *get_power_limit(size_t *total_entries) { enum usb_chg_type type; @@ -94,6 +111,7 @@ static const struct cpu_power_limits *get_power_limit(size_t *total_entries) if (type == USB_CHG_TYPE_PROPRIETARY) { if (watts == CHARGER_170W) { printk(BIOS_INFO, "PL124: Performance.\n"); + update_oem_variables_perf(); *total_entries = ARRAY_SIZE(perf_limits); return perf_limits; } else { @@ -104,6 +122,7 @@ static const struct cpu_power_limits *get_power_limit(size_t *total_entries) } else { if (watts >= CHARGER_90W) { printk(BIOS_INFO, "PL124: Performance.\n"); + update_oem_variables_perf(); *total_entries = ARRAY_SIZE(perf_limits); return perf_limits; } else { |