diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-02-06 15:42:43 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-09 19:29:41 +0000 |
| commit | 441867d2f068a3ff9951fcbbb97d3a07c1867626 (patch) | |
| tree | ac36773a7eb1f542bb3c7af9d7900856feb6ee94 /src/mainboard/google | |
| parent | cc633f2e3a946e3538f71e9e9918183f8f40015e (diff) | |
mb/google/dedede: Turn on ESPI device in devicetree
BUG=None
TEST=Build the mainboard.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I12a63e5776619e5a7684cf1edad78b0fd6fac12c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38739
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/google/dedede/variants/baseboard/gpio.c | 9 |
2 files changed, 13 insertions, 2 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index aedd32f7cc..44d9ca2e3b 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -56,7 +56,11 @@ chip soc/intel/tigerlake device pci 1e.1 off end # UART 1 device pci 1e.2 off end # GSPI 0 device pci 1e.3 off end # GSPI 1 - device pci 1f.0 off end # eSPI Interface + device pci 1f.0 on + chip ec/google/chromeec + device pnp 0c09.0 on end + end + end # eSPI Interface device pci 1f.1 off end # P2SB device pci 1f.2 off end # Power Management Controller device pci 1f.3 off end # Intel HDA/cAVS diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index 6c95a1d0f0..090841260f 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -13,7 +13,14 @@ /* Pad configuration in ramstage*/ static const struct pad_config gpio_table[] = { - /* ToDo: Fill gpio configuration */ + /* GPP_A0 thru GPP_A6 come configured out of reset, do not touch */ + /* A0 : ESPI_IO0 */ + /* A1 : ESPI_IO1 */ + /* A2 : ESPI_IO2 */ + /* A3 : ESPI_IO3 */ + /* A4 : ESPI_CS# */ + /* A5 : ESPI_CLK */ + /* A6 : ESPI_RESET_L */ }; /* Early pad configuration in bootblock */ |