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authorAngel Pons <th3fanbus@gmail.com>2021-02-19 11:20:27 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-22 07:23:58 +0000
commit3d695d2e6adc9f46f9c08a841ce0b1389337d74a (patch)
tree2b30332734998bb13dffb177feeeef9036e965e5 /src/mainboard/google
parent2a58e187af790dab8a9c1dbeebe4b57a9c259a3c (diff)
mb/google/oak: Clean up TPM Kconfig
Rowan was the only Oak variant that used TPM2. However, it was removed in commit 0aa1f9e905 (google/oak: Delete rowan). Since the other three variants use TPM1, remove now-unnecessary Kconfig options from Oak. Change-Id: If19df00463f63f1101475f59b5ecea5a9724a9ab Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50907 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/oak/Kconfig17
-rw-r--r--src/mainboard/google/oak/bootblock.c3
2 files changed, 3 insertions, 17 deletions
diff --git a/src/mainboard/google/oak/Kconfig b/src/mainboard/google/oak/Kconfig
index d8986c63c9..7f0d8b5d3f 100644
--- a/src/mainboard/google/oak/Kconfig
+++ b/src/mainboard/google/oak/Kconfig
@@ -5,18 +5,6 @@ config BOARD_GOOGLE_OAK_COMMON
if BOARD_GOOGLE_OAK_COMMON
-config OTHERS_HAVE_TPM1
- bool
- default y
- select MAINBOARD_HAS_I2C_TPM_GENERIC
- select MAINBOARD_HAS_TPM1
-
-config OAK_HAS_TPM2
- bool
- default n
- select MAINBOARD_HAS_I2C_TPM_CR50
- select MAINBOARD_HAS_TPM2
-
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SOC_MEDIATEK_MT8173
@@ -25,6 +13,8 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVER_PARADE_PS8640
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
+ select MAINBOARD_HAS_I2C_TPM_GENERIC
+ select MAINBOARD_HAS_TPM1
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_FORCE_NATIVE_VGA_INIT
select HAVE_LINEAR_FRAMEBUFFER
@@ -49,8 +39,7 @@ config DRIVER_TPM_I2C_BUS
config DRIVER_TPM_I2C_ADDR
hex
- default 0x20 if !OAK_HAS_TPM2
- default 0x50 if OAK_HAS_TPM2
+ default 0x20
config BOOT_DEVICE_SPI_FLASH_BUS
int
diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c
index 82409cfc13..4762a4e083 100644
--- a/src/mainboard/google/oak/bootblock.c
+++ b/src/mainboard/google/oak/bootblock.c
@@ -73,9 +73,6 @@ void bootblock_mainboard_init(void)
/* Init i2c bus 2 Timing register for TPM */
mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS);
- if (CONFIG(OAK_HAS_TPM2))
- gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING);
-
mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz,
0);