diff options
| author | Yu-Ping Wu <yupingso@chromium.org> | 2022-10-06 12:37:25 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2022-10-18 03:01:16 +0000 |
| commit | 3a1333da368068399cbb4348d8118af628ca9b0e (patch) | |
| tree | 5acbff5d7e5845ffdd9f06d4fe20bebb16cc8c57 /src/mainboard/google | |
| parent | a2efadd1b42bd554d6e352f584a2979913fa7ea1 (diff) | |
mb/google/corsola: Configure TPM IRQ as EDGE_FALLING
When the GSC is ready for the next transaction, it triggers a
GSC_AP_INT_ODL (active low) pulse with 100us duration to notify the AP.
Currently the TPM IRQ is configured as EDGE_RISING. Changing it to
EDGE_FALLING would speed up each register access by 100us. On Kingler,
this saves 20ms for the boot time (0.93s -> 0.91s).
BUG=b:235185547
TEST=emerge-corsola coreboot
TEST=Kingler booted without TPM errors
BRANCH=none
Change-Id: Id282e0f35694bd151781845cbd5aa4b389a30ddc
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/corsola/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/corsola/bootblock.c b/src/mainboard/google/corsola/bootblock.c index 87b972d59c..292f1b92e7 100644 --- a/src/mainboard/google/corsola/bootblock.c +++ b/src/mainboard/google/corsola/bootblock.c @@ -18,6 +18,6 @@ void bootblock_mainboard_init(void) mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0); mtk_snfc_init(SPI_NOR_GPIO_SET1); setup_chromeos_gpios(); - gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING); + gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_FALLING); usb3_hub_reset(); } |