diff options
| author | Morris Hsu <morris-hsu@quanta.corp-partner.google.com> | 2023-03-20 15:29:09 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-03-22 05:33:11 +0000 |
| commit | 2cd0e20929f56924dc719014a13513c2b9d2727c (patch) | |
| tree | abda332a5684e9983c1698f19728fa5e99ec5b87 /src/mainboard/google | |
| parent | 06562ea5e9c58faece88ffe17bb54d00e48590bf (diff) | |
mb/google/dedede/var/magolor: Add FW_CONFIG probe for EXT_VR
Add FW_CONFIG probe for absent ANPEC APW8738BQBI IC on magolor.
BUG=b:223687184
TEST=emerge-dedede coreboot chromeos-bootimage and pass suspend_test and
firmware_ConsecutiveBoot test
Change-Id: I47ad313c4a14edb687913698986df9ece6cd721d
Signed-off-by: Morris Hsu <morris-hsu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73833
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/dedede/variants/magolor/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/dedede/variants/magolor/ramstage.c | 14 |
2 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/magolor/Makefile.inc b/src/mainboard/google/dedede/variants/magolor/Makefile.inc index f2cbf8d8e0..3151ca3ae7 100644 --- a/src/mainboard/google/dedede/variants/magolor/Makefile.inc +++ b/src/mainboard/google/dedede/variants/magolor/Makefile.inc @@ -2,5 +2,6 @@ ramstage-$(CONFIG_FW_CONFIG) += variant.c ramstage-y += gpio.c +ramstage-y += ramstage.c $(call add_vbt_to_cbfs, vbt_magister.bin, magister-data.vbt) diff --git a/src/mainboard/google/dedede/variants/magolor/ramstage.c b/src/mainboard/google/dedede/variants/magolor/ramstage.c new file mode 100644 index 0000000000..5a671b9c63 --- /dev/null +++ b/src/mainboard/google/dedede/variants/magolor/ramstage.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <baseboard/variants.h> +#include <fw_config.h> +#include <soc/soc_chip.h> +static void ext_vr_update(void) +{ + struct soc_intel_jasperlake_config *cfg = config_of_soc(); + if (fw_config_probe(FW_CONFIG(EXT_VR, EXT_VR_ABSENT))) + cfg->disable_external_bypass_vr = 1; +} +void variant_devtree_update(void) +{ + ext_vr_update(); +} |