diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-04-23 15:11:48 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-14 08:56:15 +0000 |
| commit | 1a9c6270ac7d535f79d2d8ff29113b3a54797972 (patch) | |
| tree | 2ac42e222bd2ddc8ab7728af69c075d62e136732 /src/mainboard/google | |
| parent | 052c96348576b292b9a9b506208641ec500035c0 (diff) | |
mb/google/brya: Add the first FW_CONFIG fields to brya0
1) USB sub-board
2) SD sub-board
3) GSC
4) Keyboard backlight
5) Audio sub-board
6) LTE module
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I74ca5ab5366a17e9e1784ec872b9cd77f8663c7f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54097
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/brya0/overridetree.cb | 31 |
2 files changed, 33 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index faa533544c..c28c293c31 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -14,6 +14,8 @@ config BOARD_GOOGLE_BASEBOARD_BRYA select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_ESPI select EC_GOOGLE_CHROMEEC_SKUID + select FW_CONFIG + select FW_CONFIG_SOURCE_CHROMEEC_CBI select GOOGLE_SMBIOS_MAINBOARD_VERSION select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index f56b8d68b9..ccc0384497 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -1,3 +1,34 @@ +fw_config + field DB_USB 0 3 + option USB_ABSENT 0 + option USB3_PS8815 1 + end + field DB_SD 4 5 + option SD_ABSENT 0 + option SD_GL9755S 1 + end + field GSC 6 6 + option H1D 0 + option H1B 1 + end + field KB_BL 7 7 + option KB_BL_ABSENT 0 + option KB_BL_PRESENT 1 + end + field AUDIO 8 10 + option AUDIO_UNKNOWN 0 + option MAX98357_ALC5682I_I2S 1 + option MAX98373_ALC5682_SNDW 2 + option MAX98373_NAU88L25B_I2S 3 + option ALC1019_NAU88L25B_I2S 4 + end + field DB_LTE 11 12 + option LTE_ABSENT 0 + option LTE_USB 1 + option LTE_PCIE 2 + end +end + chip soc/intel/alderlake register "SaGv" = "SaGv_Disabled" |