diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2023-07-28 09:13:05 -0500 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-07-31 05:10:31 +0000 |
| commit | 16b6937ea7520aa2c55df7a2c7cc624e5dfbe68f (patch) | |
| tree | d54271abb9338b560437ae355e3f278773ffc9c4 /src/mainboard/google | |
| parent | 8bd2b5c65712bf45209600d4740d9f3143bf82ea (diff) | |
mb/google/{auron,link,slippy}/acpi: Drop EC serial port
The EC serial port on these devices is not accessible to the end user
and exposing it to the OS via ACPI serves no purpose. Debugging over
the EC serial port (via the servo interface) does not require the
ACPI exist. Drop it since it's not needed and serves no purpose.
TEST=build/boot Win11 on auron/link/slippy, verify Windows Device
Manager no longer shows an unusable COM port.
Change-Id: If453bfca8e094aa06043293bdf91a40c38cc7866
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76793
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: CoolStar <coolstarorganization@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/auron/acpi/superio.asl | 1 | ||||
| -rw-r--r-- | src/mainboard/google/link/acpi/superio.asl | 1 | ||||
| -rw-r--r-- | src/mainboard/google/slippy/acpi/superio.asl | 1 |
3 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/google/auron/acpi/superio.asl b/src/mainboard/google/auron/acpi/superio.asl index e3a31bc657..42eaba1825 100644 --- a/src/mainboard/google/auron/acpi/superio.asl +++ b/src/mainboard/google/auron/acpi/superio.asl @@ -6,7 +6,6 @@ #define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources #define SIO_EC_HOST_ENABLE // EC Host Interface Resources #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard -#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1 /* ACPI code for EC SuperIO functions */ #include <ec/google/chromeec/acpi/superio.asl> diff --git a/src/mainboard/google/link/acpi/superio.asl b/src/mainboard/google/link/acpi/superio.asl index 0dc0696336..b30da54749 100644 --- a/src/mainboard/google/link/acpi/superio.asl +++ b/src/mainboard/google/link/acpi/superio.asl @@ -6,7 +6,6 @@ #define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources #define SIO_EC_HOST_ENABLE // EC Host Interface Resources #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard -#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1 /* ACPI code for EC SuperIO functions */ #include "../../../../ec/google/chromeec/acpi/superio.asl" diff --git a/src/mainboard/google/slippy/acpi/superio.asl b/src/mainboard/google/slippy/acpi/superio.asl index 587bb8bf0f..4a1456bb0e 100644 --- a/src/mainboard/google/slippy/acpi/superio.asl +++ b/src/mainboard/google/slippy/acpi/superio.asl @@ -6,7 +6,6 @@ #define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources #define SIO_EC_HOST_ENABLE // EC Host Interface Resources #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard -#define SIO_EC_ENABLE_COM1 // Enable Serial Port 1 /* ACPI code for EC SuperIO functions */ #include <ec/google/chromeec/acpi/superio.asl> |