diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-10-15 12:22:27 -0500 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2015-11-07 03:28:50 +0100 |
| commit | 1148786c05d97b4c646c11e770b275809b562953 (patch) | |
| tree | 98d03627dc2f49c788042cb0f743c2e1dd377dc9 /src/mainboard/google | |
| parent | 0325a45fd03eb33818c7ac32208ea6568236ec14 (diff) | |
arm64: remove spin table support
As ARM Trusted Firmware is the only first class citizen for
booting arm64 multi-processor in coreboot remove spintable
support. If SoCs want to bring up MP then ATF needs to be
ported and integrated.
Change-Id: I1f38b8d8b0952eee50cc64440bfd010b1dd0bff4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11908
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/foster/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/google/rush/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/rush/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/google/rush_ryu/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/rush_ryu/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/google/smaug/devicetree.cb | 2 |
6 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/google/foster/devicetree.cb b/src/mainboard/google/foster/devicetree.cb index e800139263..0255b5364a 100644 --- a/src/mainboard/google/foster/devicetree.cb +++ b/src/mainboard/google/foster/devicetree.cb @@ -14,8 +14,6 @@ ## chip soc/nvidia/tegra210 - register "spintable_addr" = "0x80000008" - device cpu_cluster 0 on device cpu 0 on end device cpu 1 on end diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig index 7a411b3d85..fcf755ae98 100644 --- a/src/mainboard/google/rush/Kconfig +++ b/src/mainboard/google/rush/Kconfig @@ -27,7 +27,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_DO_SOR_INIT select MAINBOARD_HAS_CHROMEOS select BOARD_ROMSIZE_KB_4096 - select ARM64_USE_SPINTABLE config CHROMEOS select CHROMEOS_VBNV_EC diff --git a/src/mainboard/google/rush/devicetree.cb b/src/mainboard/google/rush/devicetree.cb index f34bdc170c..fa25e1f240 100644 --- a/src/mainboard/google/rush/devicetree.cb +++ b/src/mainboard/google/rush/devicetree.cb @@ -14,8 +14,6 @@ ## chip soc/nvidia/tegra132 - register "spintable_addr" = "0x80000008" - device cpu_cluster 0 on device cpu 0 on end device cpu 1 on end diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig index 657d88a3b7..47e432f2b9 100644 --- a/src/mainboard/google/rush_ryu/Kconfig +++ b/src/mainboard/google/rush_ryu/Kconfig @@ -28,7 +28,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_DO_DSI_INIT select MAINBOARD_HAS_CHROMEOS select BOARD_ROMSIZE_KB_8192 - select ARM64_USE_SPINTABLE config CHROMEOS select CHROMEOS_VBNV_EC diff --git a/src/mainboard/google/rush_ryu/devicetree.cb b/src/mainboard/google/rush_ryu/devicetree.cb index 7bd895067f..5caa6f66fc 100644 --- a/src/mainboard/google/rush_ryu/devicetree.cb +++ b/src/mainboard/google/rush_ryu/devicetree.cb @@ -14,8 +14,6 @@ ## chip soc/nvidia/tegra132 - register "spintable_addr" = "0x80000008" - device cpu_cluster 0 on device cpu 0 on end device cpu 1 on end diff --git a/src/mainboard/google/smaug/devicetree.cb b/src/mainboard/google/smaug/devicetree.cb index 863647a5d3..e7f8647be7 100644 --- a/src/mainboard/google/smaug/devicetree.cb +++ b/src/mainboard/google/smaug/devicetree.cb @@ -14,8 +14,6 @@ ## chip soc/nvidia/tegra210 - register "spintable_addr" = "0x80000008" - device cpu_cluster 0 on device cpu 0 on end end |