diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-06-23 03:56:43 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2024-06-24 14:22:46 +0000 |
| commit | 0c1daa59b902364d26f13290dff0e44bda839539 (patch) | |
| tree | b9d4edc690126b00001714f6cea64a7f41f500cb /src/mainboard/google | |
| parent | 1a77d1e437c7dc4efd8ab665ccf1ed9d18ba835d (diff) | |
skl mainboards/dt: Drop SsicPortEnable setting if disabled
The attributes are initialized with 0 and thus setting them to 0 makes
them superfluous. Remove them.
Change-Id: Ic16d568c38d708da27efa7229e23019e71c0019b
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83173
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google')
10 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 8b4718d0f1..62a5ac225b 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -40,7 +40,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index ec11060618..c6ec0856c3 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -71,7 +71,6 @@ chip soc/intel/skylake register "SataPortsDevSlp[1]" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "0" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 2c34beb3bd..789d49a474 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -39,7 +39,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index e5220414ea..e661f3ac84 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -47,7 +47,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index cfeefb1d72..5f8b4593a5 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -35,7 +35,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index e5cbdcc66e..ea753bf737 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -43,7 +43,6 @@ chip soc/intel/skylake register "SataSalpSupport" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index ad22c77075..aebec9ff6e 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -44,7 +44,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 7c0abc141c..a5db866707 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -40,7 +40,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index dce0a89399..786354e696 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -47,7 +47,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index feaa7751be..d274e15be1 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -44,7 +44,6 @@ chip soc/intel/skylake register "SataPortsEnable[0]" = "0" register "DspEnable" = "1" register "IoBufferOwnership" = "3" - register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" |