summaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2016-09-02 20:29:39 -0500
committerAaron Durbin <adurbin@chromium.org>2016-09-06 20:17:37 +0200
commit37ddb630dd4d7c7a567302d84a814756bf36d7b4 (patch)
tree29055ef5ddaad5227228c12c9d71080e82c4179e /src/mainboard/google
parent8db1f8dabb6bb189388a25493e807fbce95fc72d (diff)
mainboard/google/reef: drop remaining proto board references
The last vestige of the proto boards is the memory sku id gpios. The internal pullups are still required because there's only pulldown stuffing options available on the reef boards. BUG=chrome-os-partner:56791 Change-Id: I04d541a897ec9aacbf2011293d18242fa32896d2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16432 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h6
-rw-r--r--src/mainboard/google/reef/variants/baseboard/memory.c21
2 files changed, 3 insertions, 24 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h
index 90cca3666d..f60bfdc6de 100644
--- a/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h
@@ -39,11 +39,7 @@
#define GPIO_PCH_WP GPIO_75
#define GPIO_EC_IN_RW GPIO_41
-/*
- * The proto boards didn't have memory SKU pins, but the same ones can be
- * utilized as post proto boards because the pins used were never connected
- * or no peripheral utilized the signals on proto boards.
- */
+/* Memory SKU GPIOs. */
#define MEM_CONFIG3 GPIO_45
#define MEM_CONFIG2 GPIO_38
#define MEM_CONFIG1 GPIO_102
diff --git a/src/mainboard/google/reef/variants/baseboard/memory.c b/src/mainboard/google/reef/variants/baseboard/memory.c
index a5b036437a..c4667f390e 100644
--- a/src/mainboard/google/reef/variants/baseboard/memory.c
+++ b/src/mainboard/google/reef/variants/baseboard/memory.c
@@ -62,14 +62,6 @@ const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle = {
},
};
-/*
- * Proto boards didn't have a memory SKU id. The configuration pins use
- * an internal weak pullup with stronger pulldowns for the 0 bits. As
- * proto boards didn't use the memory SKU pins the SKU id reads as 4'b1111,
- * i.e. 15.
- */
-#define PROTO_SKU 15
-
static const struct lpddr4_sku skus[] = {
/*
* K4F6E304HB-MGCJ - both logical channels While the parts
@@ -133,13 +125,6 @@ static const struct lpddr4_sku skus[] = {
.ch1_rank_density = LP4_8Gb_DENSITY,
.part_num = "H9HCNNN8KUMLHR",
},
- /* K4F8E304HB-MGCH - both logical channels */
- [PROTO_SKU] = {
- .speed = LP4_SPEED_2400,
- .ch0_rank_density = LP4_8Gb_DENSITY,
- .ch1_rank_density = LP4_8Gb_DENSITY,
- .part_num = "K4F8E304HB-MGCH",
- },
};
static const struct lpddr4_cfg lp4cfg = {
@@ -160,9 +145,7 @@ size_t __attribute__((weak)) variant_memory_sku(void)
[1] = MEM_CONFIG1, [0] = MEM_CONFIG0,
};
- /*
- * Read memory SKU id with internal pullups enabled to handle
- * proto boards with no SKU id pins.
- */
+ /* Need internal pullups enabled as only pulldown stuffing options
+ * exist. */
return gpio_pullup_base2_value(pads, ARRAY_SIZE(pads));
}