diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2015-07-24 15:39:31 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-08-13 16:33:37 +0200 |
| commit | 14bb36c5ca08a646dd376d81199a6f22aa66b3d4 (patch) | |
| tree | 5d2b6fc997cf179500c8af20cf76a95e85745901 /src/mainboard/google | |
| parent | edf1cb78e29edd768ef9641093bb3eae3c8c91d7 (diff) | |
glados: Enable wake from EC via LAN_WAKE#
Enable the Deep Sx pins to allow wake from the EC via LAN_WAKE#.
Report the EC wake pin LAN_WAKE as GPE[112].
BUG=chrome-os-partner:43079
BRANCH=none
TEST=suspend/resume on glados with wake from keyboard
Original-Change-Id: I99664e1e406d15e7460046a6168cbd3a377aaca4
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/288921
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I19db144ed5db183f47af03340886a5e770af8bc8
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/11171
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/glados/acpi/mainboard.asl | 3 | ||||
| -rw-r--r-- | src/mainboard/google/glados/devicetree.cb | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/glados/acpi/mainboard.asl b/src/mainboard/google/glados/acpi/mainboard.asl index 7c26e429b8..53001e4af6 100644 --- a/src/mainboard/google/glados/acpi/mainboard.asl +++ b/src/mainboard/google/glados/acpi/mainboard.asl @@ -29,6 +29,9 @@ Scope (\_SB) { Return (\_SB.PCI0.LPCB.EC0.LIDS) } + + /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ + Name (_PRW, Package(){ 112, 5 }) /* LAN_WAKE_EN */ } Device (PWRB) diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 6f89063ffb..b48556f1d5 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -3,6 +3,7 @@ chip soc/intel/skylake # Enable deep Sx states register "deep_s3_enable" = "1" register "deep_s5_enable" = "1" + register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ \ |