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authorTristan Shieh <tristan.shieh@mediatek.com>2018-09-14 11:12:14 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-10-10 12:16:43 +0000
commit022f76b0d3d571143238b0f8740b0e1d0ee99e3e (patch)
tree0c62c286730d0afbe07e1a65e356c5b56cba3160 /src/mainboard/google
parent38dc00bed15bc70bde14209f730451861a38a393 (diff)
mediatek/mt8183: Init PLLs for DRAM
Set up DRAM related PLLs. And update post divider table to fulfill all freqency settings. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: Ic197cef7d31f75ffe4e7d9e73c9cc544719943ab Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-on: https://review.coreboot.org/28667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com>
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