diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-04-26 09:43:03 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-05-08 14:18:36 +0000 |
commit | f5f1b383b1319c515338e82857461d2ab4608c1d (patch) | |
tree | 222ce4fdca15fb2d9b26e3190e1b82d908be700f /src/mainboard/google | |
parent | 64b759e2011e6e5a090e9442da3779c344734549 (diff) |
mb/superio: Rename global control devices as SUPERIO_DEV
Use SUPERIO_DEV for global control device instead of DUMMY_DEV.
Change-Id: If3555906d359695b2eae51209cd97fbaaace7e61
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25852
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/beltino/onboard.h | 2 | ||||
-rw-r--r-- | src/mainboard/google/beltino/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/jecht/onboard.h | 2 | ||||
-rw-r--r-- | src/mainboard/google/jecht/romstage.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/beltino/onboard.h b/src/mainboard/google/beltino/onboard.h index 29da766dce..2e0730912e 100644 --- a/src/mainboard/google/beltino/onboard.h +++ b/src/mainboard/google/beltino/onboard.h @@ -31,7 +31,7 @@ #define IT8772F_BASE 0x2e #define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1) #define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO) -#define IT8772F_DUMMY_DEV PNP_DEV(IT8772F_BASE, 0) +#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0) #ifndef __ACPI__ void lan_init(void); diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c index 2ddb9b12a8..b0468f55d5 100644 --- a/src/mainboard/google/beltino/romstage.c +++ b/src/mainboard/google/beltino/romstage.c @@ -137,7 +137,7 @@ void mainboard_romstage_entry(unsigned long bist) /* Early SuperIO setup */ ite_kill_watchdog(IT8772F_GPIO_DEV); - it8772f_ac_resume_southbridge(IT8772F_DUMMY_DEV); + it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV); pch_enable_lpc(); ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/google/jecht/onboard.h b/src/mainboard/google/jecht/onboard.h index a911fe60b8..d92aa16dce 100644 --- a/src/mainboard/google/jecht/onboard.h +++ b/src/mainboard/google/jecht/onboard.h @@ -50,6 +50,6 @@ enum { #define IT8772F_BASE 0x2e #define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1) #define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO) -#define IT8772F_DUMMY_DEV PNP_DEV(IT8772F_BASE, 0) +#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0) #endif diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c index 6203a1e457..c3a57202dd 100644 --- a/src/mainboard/google/jecht/romstage.c +++ b/src/mainboard/google/jecht/romstage.c @@ -54,7 +54,7 @@ void mainboard_romstage_entry(struct romstage_params *rp) void mainboard_pre_console_init(void) { /* Early SuperIO setup */ - it8772f_ac_resume_southbridge(IT8772F_DUMMY_DEV); + it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV); ite_kill_watchdog(IT8772F_GPIO_DEV); ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE); |