diff options
| author | Wayne3 Wang <Wayne3_Wang@pegatron.corp-partner.google.com> | 2021-07-22 11:09:16 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-28 22:51:07 +0000 |
| commit | eef34ef2ee469c6876424ddc58f377bfdafaeb01 (patch) | |
| tree | 32bd2d9a36a9e47e9dfc33f8539d90433dae958b /src/mainboard/google | |
| parent | a4422b84fd562b524ff9d64e29fc06089e7a2ca6 (diff) | |
mb/google/volteer/variants/drobit: Add Charger Performance Control table TCHG for DPTF setting.
Add Charger Performance Control table TCHG for DPTF setting.
BUG=b:194256990
BRANCH=firmware-volteer-13672.B
TEST=build test firmware and verified by thermal team.
Change-Id: I9dba3f0e75d07d8ee9656bd1ee8d6de2d3b8c152
Signed-off-by: Wayne3 Wang <Wayne3_Wang@pegatron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ariel Chang <ariel_chang@pegatron.corp-partner.google.com>
Reviewed-by: Paul F Yang <paul.f.yang@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Wayne3 Wang <wayne3_wang@pegatron.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/volteer/variants/drobit/overridetree.cb | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/drobit/overridetree.cb b/src/mainboard/google/volteer/variants/drobit/overridetree.cb index 8ae198c492..d779a3c27e 100644 --- a/src/mainboard/google/volteer/variants/drobit/overridetree.cb +++ b/src/mainboard/google/volteer/variants/drobit/overridetree.cb @@ -102,6 +102,14 @@ chip soc/intel/tigerlake register "options.fan.fine_grained_control" = "1" register "options.fan.step_size" = "2" + ## Charger Performance Control (Control, mA) + register "controls.charger_perf" = "{ + [0] = { 32, 2048 }, + [1] = { 29, 1856 }, + [2] = { 26, 1664 }, + [3] = { 23, 1472 } + }" + device generic 0 on end end end # DPTF |