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authorFelix Held <felix-coreboot@felixheld.de>2022-03-02 15:04:27 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-03-03 18:33:51 +0000
commitebb6723115c5049c3ad4979a25934a0ee677697c (patch)
treea77345fe0a392184c089608197c41061ed5d9e96 /src/mainboard/google
parentcf2eeff3cf9f16888881fde0efd220141347c498 (diff)
soc/amd/picasso/acpi: rename cpu.asl to pnot.asl
After the patch that moved the generation of the PPKG object to Picasso's acpi.c, only the PNOT object remained in its cpu.asl, so rename it to pnot.asl. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic77dacb146aa823fc99f779f465fff28b2aead68 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62538 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/zork/dsdt.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/dsdt.asl b/src/mainboard/google/zork/dsdt.asl
index c11052a9af..c2df9b7310 100644
--- a/src/mainboard/google/zork/dsdt.asl
+++ b/src/mainboard/google/zork/dsdt.asl
@@ -22,8 +22,8 @@ DefinitionBlock (
/* PCI IRQ mapping for the Southbridge */
#include <pcie.asl>
- /* Describe the processor tree (\_PR) */
- #include <cpu.asl>
+ /* Power state notification to ALIB */
+ #include <pnot.asl>
/* Contains the supported sleep states for this chipset */
#include <soc/amd/common/acpi/sleepstates.asl>