diff options
| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2023-03-09 16:31:38 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-03-13 00:28:26 +0000 |
| commit | d8358ee292ec3d061aeb3e5fd9be6ab1e794f7ff (patch) | |
| tree | 4f7b5af673c18c93597594429b3d2d000a266e17 /src/mainboard/google | |
| parent | 6e04d8570fdb3fa9b15432a1abad3710731ce596 (diff) | |
mb/google/brask/var/kinox: Allow USB2/3 hotplug to wakeup S0ix
Allow USB2/3 hotplug event to wake up S0ix.
BUG=b:236189998
BRANCH=firmware-brya-14505.B
TEST=Verify USB-A device could wake up Kinox
Change-Id: I8aeeeac6c21289b70bdc7ffddc57687ac39e8456
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/variants/kinox/overridetree.cb | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/kinox/overridetree.cb b/src/mainboard/google/brya/variants/kinox/overridetree.cb index 59314fd846..96e6e60951 100644 --- a/src/mainboard/google/brya/variants/kinox/overridetree.cb +++ b/src/mainboard/google/brya/variants/kinox/overridetree.cb @@ -44,6 +44,17 @@ chip soc/intel/alderlake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Rear USB Type A register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB HUB + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(6) | \ + USB_PORT_WAKE_ENABLE(7) | \ + USB_PORT_WAKE_ENABLE(8) | \ + USB_PORT_WAKE_ENABLE(9)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(4)" + register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC1)" # BTB register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable Port2 |