mb/google/kahlee/OemCustomize.c: Disable bank interleave

AmdInitPost returns AGESA_WARNING. This is because AGESA by default
enables bank interleaving, while the HW does not meet the requirements
for it. Disable bank interleaving, thus clearing AGESA_WARNING.

BUG=b:73118857
TEST= Build and run kahlee. Search for "agesawrapper_amdinitpost()
returned AGESA_SUCCESS".

Change-Id: Ice9270f9b10051dbb622344919223cf5439f5d7b
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/23763
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 11 insertions, 0 deletions

diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c
index 8ab8e547bc..6e6992de43 100644
--- a/src/mainboard/google/kahlee/OemCustomize.c
+++ b/src/mainboard/google/kahlee/OemCustomize.c
@@ -39,4 +39,15 @@ void OemPostParams(AMD_POST_PARAMS *PostParams)
 {
 	PostParams->MemConfig.PlatformMemoryConfiguration =
 				(PSO_ENTRY *)DDR4PlatformMemoryConfiguration;
+
+	/*
+	 * Bank interleaving is enabled by default in AGESA. However, from AMD's
+	 * explanation, bank interleaving is really chip select interleave,
+	 * requiring 2 chip select arriving to the DIMM (rank interleaving). As
+	 * both kahlee and grunt are hardware limited to a single chip select
+	 * arriving at the DIMM, interleave will not work. This causes AGESA to
+	 * throw a warning. To avoid the warning, interleaving needs to be
+	 * disabled.
+	 */
+	PostParams->MemConfig.EnableBankIntlv = FALSE;
 }