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| author | Felix Held <felix-coreboot@felixheld.de> | 2022-03-18 18:34:46 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-18 17:55:56 +0000 |
| commit | 79993d8be70df5ad8302211abb49b4f920c8cb95 (patch) | |
| tree | 7de742817a1f356dbf91799788f95e59c3f152fe /src/mainboard/google | |
| parent | bff1210f24a0588f0f6da3c0a1db45115c62080d (diff) | |
mb/google/brya/nivviks/overridetree: update tcss_aux_ori register name
Commit 215a97ee1c4cd87b266d63e32bf0b379e18fe849 (soc/intel/adl/chip.h:
Convert all camel case variables to snake case) converted the camel case
used in the parameter name to snake case, but
commit bd529e2e200a8fbfd455dd62be0494a2b727b9a5 (mb/google/nissa/var/
nivviks: Add TcssAuxori for nivviks) still used the old names which
breaks the upstream build. his patch is intended to be merged via
fast-path before the 24h are over to fix the tree.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I2b9049553889c77bd8c59a2c4564d36d836a4eea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62927
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/variants/nivviks/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index d423ffb5ce..c870b37614 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -16,7 +16,7 @@ chip soc/intel/alderlake # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the # motherboard to USBC connector - register "TcssAuxOri" = "5" + register "tcss_aux_ori" = "5" register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}" |