summaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
authorDaniel Kurtz <djkurtz@chromium.org>2018-04-25 10:52:09 -0600
committerMartin Roth <martinroth@google.com>2018-04-26 21:16:57 +0000
commit75ed7781cc2a734ce1316f0b439e869ce9965338 (patch)
treecdf97c7cc213abf180fbf880edc3a7a3193f0ec9 /src/mainboard/google
parent42ae0baead33b830bb82e993bdbdabdfedc356b0 (diff)
mainboard/google/kahlee: Fix EC_SMI_GPI
On the kahlee variant, EC_SMI_ODL is connected to GPIO6, which uses GEVENT 10 (GPE10). Fix this up, and also clean up the EC_*_GPI definition format a bit to match the format in the baseboard/gpio.h. BUG=b:78461678 TEST=build coreboot for kahlee Change-Id: I9445efbc02559c2a7c90f67bcb0154b04b03a1aa Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/25826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h9
1 files changed, 3 insertions, 6 deletions
diff --git a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h
index 26dd175eda..cf0eaf530a 100644
--- a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h
+++ b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h
@@ -43,11 +43,8 @@
#endif /* _ACPI__ */
-/* AGPIO22 -> GPE3 */
-#define EC_SCI_GPI 3
-
-/* TODO: Fix this */
-/* GPIO_S5_07 is EC_SMI#, but it is bit 23 in GPE_STS and ALT_GPIO_SMI. */
-#define EC_SMI_GPI 23
+/* These define the GPE, not the GPIO. */
+#define EC_SCI_GPI 3 /* AGPIO 22 -> GPE 3 */
+#define EC_SMI_GPI 10 /* AGPIO 6 -> GPE 10 */
#endif /* __VARIANT_GPIO_H__ */