summaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
authorMartin Roth <martinroth@chromium.org>2021-04-28 12:15:58 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-04-30 23:19:58 +0000
commit5e1c9a9fd6266fa8b04199535e1fbecc84292cda (patch)
treef46ae98a31811530822864baf22237b33b61e63e /src/mainboard/google
parent433c82761be04fcabaaf22557cd673bf71330feb (diff)
mb/google/mancomb: Add SPI configuration to Kconfig
Mancomb will have the boot flash on a daughterboard, so the SPI speeds need to be low for now. BUG=b:182211161 TEST=Build Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Icacb68d65fb414197d7b8d45799527d8d2568dc7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/mancomb/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/mancomb/Kconfig b/src/mainboard/google/mancomb/Kconfig
index 363165e351..4ed29cd176 100644
--- a/src/mainboard/google/mancomb/Kconfig
+++ b/src/mainboard/google/mancomb/Kconfig
@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS
select ELOG
select ELOG_GSMI
select HAVE_ACPI_RESUME
+ select HAVE_EM100_SUPPORT
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_I2C_TPM_CR50
select MAINBOARD_HAS_TPM2
@@ -62,6 +63,16 @@ config DRIVER_TPM_I2C_ADDR
hex
default 0x50
+config EFS_SPI_READ_MODE
+ int
+ default 0 if EM100 # Normal read mode
+ default 4 # Dual IO (1-2-2)
+
+config EFS_SPI_SPEED
+ int
+ default 3 if EM100 # 16.66 MHz
+ default 1 # 33.33 MHz
+
config VARIANT_DIR
string
default "mancomb" if BOARD_GOOGLE_MANCOMB