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authorIan Feng <ian_feng@compal.corp-partner.google.com>2021-02-22 16:16:24 +0800
committerKarthik Ramasubramanian <kramasub@google.com>2021-02-23 15:38:48 +0000
commit5273322f7395544dfd82d7e380d34aa4f0e3256c (patch)
tree8f57450c82a1a7861148fbc0b95912ad671e7045 /src/mainboard/google
parent85a967f248e7f07934cb6bcb0b39f0f9e725953c (diff)
mb/google/dedede: Export EC_IN_RW GPIO to payload
Set up EC_IN_RW GPIO in coreboot. BUG=b:180686277 TEST=Verified that EC_IN_RW signal is read correctly in depthcharge. Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: Ic41012d3d4843dcab0f6dd9c28396cb9d5c49f08 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51001 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/dedede/chromeos.c1
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h3
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/chromeos.c b/src/mainboard/google/dedede/chromeos.c
index 0b77ebbd75..fb904cca83 100644
--- a/src/mainboard/google/dedede/chromeos.c
+++ b/src/mainboard/google/dedede/chromeos.c
@@ -12,6 +12,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+ {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h
index 855ab6d869..4b72ae37f4 100644
--- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h
@@ -17,6 +17,9 @@
/* EC sync irq is GPP_C15_IRQ */
#define EC_SYNC_IRQ GPP_C15_IRQ
+/* EC in RW */
+#define GPIO_EC_IN_RW GPP_C14
+
/* Memory configuration board straps */
#define GPIO_MEM_CONFIG_0 GPP_C0
#define GPIO_MEM_CONFIG_1 GPP_C3