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authorStanley Wu <stanley1.wu@lcfc.corp-partner.google.com>2023-08-09 18:13:12 +0800
committerMartin L Roth <gaumless@gmail.com>2023-08-15 14:56:40 +0000
commit456e500155146e011dc555eb084426f4b68fc4d1 (patch)
treeb4bf38291b1cb67fb5618a0769ee2a8c00d889ea /src/mainboard/google
parent8f0075c37924fc3be82b226d13a5e522eea9f795 (diff)
mb/google/dedede/var/boxy: update DPTF thermal settings
Update DPTF thermal settings from thermal team suggestion: 1. Modify CPU passive policy to 95. 2. Modify TS0/TS1/TS2 passive policy to 90 for CPU. 3. Modify TS1 passtve policy watt to 6w. 4. Modify TS0/TS1/TS2 critical policy to 100. BUG=b:294479707 TEST=Build and verify DPTF value by thermal team on Boxy system Change-Id: Ic34e44f218ff980c54bf93841880fab5e21b3fca Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77108 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/dedede/variants/boxy/overridetree.cb14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/google/dedede/variants/boxy/overridetree.cb b/src/mainboard/google/dedede/variants/boxy/overridetree.cb
index 10ae686a8c..fd6e992edd 100644
--- a/src/mainboard/google/dedede/variants/boxy/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/boxy/overridetree.cb
@@ -87,18 +87,18 @@ chip soc/intel/jasperlake
chip drivers/intel/dptf
## Passive Policy
register "policies.passive" = "{
- [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
- [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
- [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 15000),
- [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 55, 15000)
+ [0] = DPTF_PASSIVE(CPU, CPU, 95, 10000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 60000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 60000),
+ [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 90, 15000)
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
- [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
- [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),
- [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN)
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN)
}"
register "controls.power_limits" = "{